| Age | Commit message (Expand) | Author | 
|---|---|---|
| 2025-09-05 | Merge branch 'x86/apic' into x86/sev, to resolve conflict | Ingo Molnar | 
| 2025-09-03 | x86/sev: Move GHCB page based HV communication out of startup code | Ard Biesheuvel | 
| 2025-09-01 | x86/sev: Prevent SECURE_AVIC_CONTROL MSR interception for Secure AVIC guests | Neeraj Upadhyay | 
| 2025-09-01 | x86/apic: Add support to send IPI for Secure AVIC | Neeraj Upadhyay | 
| 2025-08-12 | x86/sev: Improve handling of writes to intercepted TSC MSRs | Nikunj A Dadhania | 
| 2025-06-27 | x86/sev/vc: Fix EFI runtime instruction emulation | Gerd Hoffmann | 
| 2025-05-15 | x86/cpuid: Set <asm/cpuid/api.h> as the main CPUID header | Ahmed S. Darwish | 
| 2025-05-05 | x86/sev: Disentangle #VC handling code from startup code | Ard Biesheuvel | 
