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path: root/arch/x86/include/asm
AgeCommit message (Expand)Author
2025-09-23KVM: x86/mmu: WARN on attempt to check permissions for Shadow Stack #PFSean Christopherson
2025-09-23KVM: VMX: Introduce CET VMCS fields and control bitsYang Weijiang
2025-09-23KVM: x86: Check XSS validity against guest CPUIDsChao Gao
2025-09-23KVM: x86: Merge 'svm' into 'cet' to pick up GHCB dependenciesSean Christopherson
2025-09-23KVM: x86: Add helper to retrieve current value of user return MSRHou Wenlong
2025-09-23KVM: SEV: Validate XCR0 provided by guest in GHCBSean Christopherson
2025-09-22x86/topology: Implement topology_is_core_online() to address SMT regressionThomas Gleixner
2025-09-18KVM: x86: Rework KVM_REQ_MSR_FILTER_CHANGED into a generic RECALC_INTERCEPTSSean Christopherson
2025-09-18KVM: x86/pmu: Move PMU_CAP_{FW_WRITES,LBR_FMT} into msr-index.h headerDapeng Mi
2025-09-17x86/sev: Add new dump_rmp parameter to snp_leak_pages() APIAshish Kalra
2025-09-17x86/cpu/topology: Define AMD64_CPUID_EXT_FEAT MSRK Prateek Nayak
2025-09-17x86/cpu: Rename and move CPU model entry for Diamond RapidsTony Luck
2025-09-17x86: Use generic TIF bitsThomas Gleixner
2025-09-16KVM: x86/pmu: Correct typo "_COUTNERS" to "_COUNTERS"Dapeng Mi
2025-09-16KVM: TDX: Reject fully in-kernel irqchip if EOIs are protected, i.e. for TDX VMsSagi Shahar
2025-09-16Merge branch 'x86/urgent' into x86/apic, to resolve conflictIngo Molnar
2025-09-15x86/sev: Guard sev_evict_cache() with CONFIG_AMD_MEM_ENCRYPTTom Lendacky
2025-09-15x86/bugs: Simplify SSB cmdline parsingDavid Kaplan
2025-09-15x86/cpu: Detect FreeBSD Bhyve hypervisorDavid Woodhouse
2025-09-15x86/resctrl: Add data structures and definitions for ABMC assignmentBabu Moger
2025-09-15x86/resctrl: Add support to enable/disable AMD ABMC featureBabu Moger
2025-09-15x86/cpufeatures: Add support for Assignable Bandwidth Monitoring Counters (ABMC)Babu Moger
2025-09-15x86/resctrl: Remove the rdt_mon_features global variableTony Luck
2025-09-15x86,fs/resctrl: Replace architecture event enabled checksTony Luck
2025-09-15Merge tag 'v6.17-rc6' into drm-nextDave Airlie
2025-09-11x86/virt/tdx: Use precalculated TDVPR page physical addressKai Huang
2025-09-11x86/kvm: Make kvm_async_pf_task_wake() a local static helperSean Christopherson
2025-09-11x86/mce: Define BSP-only initYazen Ghannam
2025-09-10Merge tag 'vmscape-for-linus-20250904' of git://git.kernel.org/pub/scm/linux/...Linus Torvalds
2025-09-10Fix access to video_is_primary_device() when compiled without CONFIG_VIDEOMario Limonciello (AMD)
2025-09-08x86: Add __attribute_const__ to ffs()-family implementationsKees Cook
2025-09-08xen: replace XENFEAT_auto_translated_physmap with xen_pv_domain()Juergen Gross
2025-09-08x86/asm: Remove code depending on __GCC_ASM_FLAG_OUTPUTS__Uros Bizjak
2025-09-05KVM/TDX: Explicitly do WBINVD when no more TDX SEAMCALLsKai Huang
2025-09-05x86/virt/tdx: Mark memory cache state incoherent when making SEAMCALLKai Huang
2025-09-05x86/sme: Use percpu boolean to control WBINVD during kexecKai Huang
2025-09-05x86/kexec: Consolidate relocate_kernel() function parametersKai Huang
2025-09-05x86/mce: Cleanup bank processing on initBorislav Petkov
2025-09-05x86/mce/amd: Remove return value for mce_threshold_{create,remove}_device()Yazen Ghannam
2025-09-05Merge branch 'x86/apic' into x86/sev, to resolve conflictIngo Molnar
2025-09-04x86,ibt: Use UDB instead of 0xEAPeter Zijlstra
2025-09-04x86/sev: Zap snp_abort()Borislav Petkov (AMD)
2025-09-04x86/apic/savic: Do not use snp_abort()Borislav Petkov (AMD)
2025-09-03x86/boot: Move startup code out of __head sectionArd Biesheuvel
2025-09-03efistub/x86: Remap inittext read-execute when neededArd Biesheuvel
2025-09-03x86/boot: Create a confined code area for startup codeArd Biesheuvel
2025-09-03x86/sev: Use boot SVSM CA for all startup and init codeArd Biesheuvel
2025-09-03x86/sev: Pass SVSM calling area down to early page state change APIArd Biesheuvel
2025-09-03x86/sev: Avoid global variable to store virtual address of SVSM areaArd Biesheuvel
2025-09-03x86/sev: Move GHCB page based HV communication out of startup codeArd Biesheuvel