| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-10-21 | x86/cpu: Fix migration safety with X86_BUG_NULL_SEL | Jane Malalane |
| 2021-06-01 | perf/x86/rapl: Use CPUID bit on AMD and Hygon parts | Andrew Cooper |
| 2021-03-06 | x86/cpu/hygon: Set __max_die_per_package on Hygon | Pu Wen |
| 2020-12-08 | x86/cpu/amd: Remove dead code for TSEG region remapping | Arvind Sankar |
| 2020-11-19 | x86/CPU/AMD: Save AMD NodeId as cpu_die_id | Yazen Ghannam |
| 2020-08-06 | locking/seqlock, headers: Untangle the spaghetti monster | Peter Zijlstra |
| 2019-07-22 | x86: Remove X86_FEATURE_MFENCE_RDTSC | Josh Poimboeuf |
| 2019-03-23 | x86/CPU/hygon: Fix phys_proc_id calculation logic for multi-die processors | Pu Wen |
| 2018-09-27 | x86/cpu: Get cache info and setup cache cpumap for Hygon Dhyana | Pu Wen |
| 2018-09-27 | x86/cpu: Create Hygon Dhyana architecture support file | Pu Wen |
 |
index : linux-toradex.git | |
| Linux kernel for Apalis and Colibri modules | Toradex |
| summaryrefslogtreecommitdiff |