| Age | Commit message (Expand) | Author |
|---|---|---|
| 2013-08-13 | clk/zynq/clkc: Add CLK_SET_RATE_PARENT flag to ethernet muxes | Soren Brinkmann |
| 2013-08-13 | clk/zynq/clkc: Add dedicated spinlock for the SWDT | Soren Brinkmann |
| 2013-05-27 | arm: zynq: Migrate platform to clock controller | Soren Brinkmann |
| 2013-05-27 | clk: zynq: Add clock controller driver | Soren Brinkmann |
| 2013-05-21 | clk: zynq: Factor out PLL driver | Soren Brinkmann |
