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path: root/drivers/clk
AgeCommit message (Expand)Author
2025-09-17clk: at91: add ACR in all PLL settingsCristian Birsan
2025-09-17clk: at91: sam9x7: Add peripheral clock id for pmeccBalamanikandan Gunasundar
2025-09-17clk: at91: clk-master: Add check for divide by 3Ryan Wanner
2025-09-17clk: at91: clk-sam9x60-pll: force write to PLL_UPDT registerNicolas Ferre
2025-09-14clk: tegra: dfll: Add CVB tables for Tegra114Svyatoslav Ryhel
2025-09-13clk: sunxi-ng: add support for the A523/T527 MCU CCUChen-Yu Tsai
2025-09-13clk: sunxi-ng: div: support power-of-two dividersChen-Yu Tsai
2025-09-13clk: sunxi-ng: sun55i-a523-ccu: Add missing NPU module clockChen-Yu Tsai
2025-09-12clk: imx95-blk-ctl: Save/restore registers when RPM routines are calledLaurentiu Palcu
2025-09-12clk: imx95-blk-ctl: Save platform data in imx95_blk_ctl structureLaurentiu Palcu
2025-09-12clk: renesas: r9a09g05[67]: Reduce differencesGeert Uytterhoeven
2025-09-12clk: renesas: r9a09g047: Add USB3.0 clocks/resetsBiju Das
2025-09-12clk: renesas: cpg-mssr: Fix memory leak in cpg_mssr_reserved_init()Yuan CHen
2025-09-11clk: qcom: gcc-sc8280xp: drop obsolete PCIe GDSC commentJohan Hovold
2025-09-11clk: qcom: tcsrcc-x1e80100: Set the bi_tcxo as parent to eDP refclkAbel Vesa
2025-09-12clk: sunxi-ng: sun6i-rtc: Add A523 specificsChen-Yu Tsai
2025-09-11clk: renesas: r9a09g056: Add clock and reset entries for I3CLad Prabhakar
2025-09-11clk: renesas: r9a09g057: Add clock and reset entries for I3CLad Prabhakar
2025-09-11clk: tegra: Add DFLL DVCO reset control for Tegra114Svyatoslav Ryhel
2025-09-11dt-bindings: clock: tegra30: Add IDs for CSI pad clocksSvyatoslav Ryhel
2025-09-10clk: sunxi-ng: mp: Fix dual-divider clock rate readbackChen-Yu Tsai
2025-09-09clk: qcom: dispcc-glymur: Constify 'struct qcom_cc_desc'Imran Shaik
2025-09-08clk: scmi: migrate round_rate() to determine_rate()Brian Masney
2025-09-08clk: ti: fapll: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: ti: dra7-atl: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: ti: divider: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: ti: composite: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: ti: dpll: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: ti: dpll: change error return from ~0 to -EINVALBrian Masney
2025-09-08clk: ti: dpll: remove round_rate() in favor of determine_rate()Brian Masney
2025-09-08clk: tegra: tegra210-emc: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: tegra: super: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: tegra: pll: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: tegra: periph: divider: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: tegra: divider: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: tegra: audio-sync: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: fixed-factor: drop round_rate() clk opsBrian Masney
2025-09-08clk: divider: remove round_rate() in favor of determine_rate()Brian Masney
2025-09-08clk: visconti: pll: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: versatile: vexpress-osc: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: versatile: icst: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: versaclock7: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: versaclock5: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: ux500: prcmu: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: spear: vco-pll: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: spear: gpt-synth: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: spear: frac-synth: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: spear: aux-synth: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: sp7021: convert from round_rate() to determine_rate()Brian Masney
2025-09-08clk: rockchip: pll: convert from round_rate() to determine_rate()Brian Masney
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