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path: root/drivers/gpu/drm/i915/display/intel_dsb.c
AgeCommit message (Expand)Author
2025-02-14drm/i915/display: Evade scanline 0 as well if PSR1 or PSR2 is enabledJouni Högander
2025-02-14drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bitJouni Högander
2025-02-12drm/i915/dsb: Decode DSB error interruptsVille Syrjälä
2025-02-12drm/i915/dsb: Introduce intel_dsb_poll()Ville Syrjälä
2025-02-12drm/i915/vrr: Account for TRANS_PUSH delayVille Syrjälä
2025-02-12drm/i915/dsb: Move the +1 usec adjustment into dsb_wait_usec()Ville Syrjälä
2025-01-23drm/i915/display: fix typos in i915/display filesNitin Gote
2025-01-15drm/i915/vrr: Introduce intel_vrr_vblank_delay()Ville Syrjälä
2025-01-15drm/i915: Consolidate intel_pre_commit_crtc_state()Ville Syrjälä
2025-01-15drm/i915: Extract intel_mode_vblank_delay()Ville Syrjälä
2025-01-15drm/i915: Introduce intel_vrr_{vmin,vmax}_vtotal()Ville Syrjälä
2024-11-28drm/i915/dsb: Nuke the MMIO->indexed register write logicVille Syrjälä
2024-11-28drm/i915/dsb: Don't use indexed register writes needlesslyVille Syrjälä
2024-10-17Merge drm/drm-next into drm-intel-nextRodrigo Vivi
2024-10-04drm/i915/dsb: Introduce intel_dsb_wait_vblank_delay()Ville Syrjälä
2024-10-04drm/i915/dsb: Introduce intel_dsb_wait_vblanks()Ville Syrjälä
2024-10-04drm/i915/dsb: Introduce intel_dsb_wait_usec()Ville Syrjälä
2024-10-04drm/i915/dsb: Introduce intel_dsb_vblank_evade()Ville Syrjälä
2024-10-04drm/i915/dsb: Enable programmable DSB interruptVille Syrjälä
2024-10-04drm/i915/dsb: Avoid reads of the DSB buffer for indexed register writesVille Syrjälä
2024-09-18drm/xe: Revert "drm/i915: Disable DSB in Xe KMD"Animesh Manna
2024-09-05drm/i915/display: pass display to intel_crtc_for_pipe()Jani Nikula
2024-08-29drm/i915/dsb: Clear DSB_ENABLE_DEWAKE once the DSB is doneVille Syrjälä
2024-08-29drm/i915/dsb: Allow intel_dsb_chain() to use DSB_WAIT_FOR_VBLANKVille Syrjälä
2024-08-29drm/i915/dsb: Introduce intel_dsb_chain()Ville Syrjälä
2024-08-29drm/i915/dsb: Introduce intel_dsb_wait_scanline_{in,out}()Ville Syrjälä
2024-08-29drm/i915/dsb: Precompute DSB_CHICKENVille Syrjälä
2024-08-29drm/i915/dsb: Account for VRR properly in DSB scanline stuffVille Syrjälä
2024-08-29drm/i915/dsb: Fix dewake scanlineVille Syrjälä
2024-08-29drm/i915/dsb: Shuffle code aroundVille Syrjälä
2024-08-29drm/i915/dsb: Convert dewake_scanline to a hw scanline number earlierVille Syrjälä
2024-08-29drm/i915/dsb: Hook up DSB error interruptsVille Syrjälä
2024-06-20drm/i915/dsb: Add i915.enable_dsb module parameterVille Syrjälä
2024-06-20drm/i915/dsb: Convert the DSB code to use intel_display rather than i915Ville Syrjälä
2024-06-20drm/i915/dsb: Plumb the whole atomic state into intel_dsb_prepare()Ville Syrjälä
2024-06-05drm/i915/dsb: Pass DSB engine ID to intel_dsb_prepare()Ville Syrjälä
2024-06-05drm/i915/dsb: Move DSB ID definition to the headerVille Syrjälä
2024-06-05drm/i915/dsb: Polish the DSB ID enumVille Syrjälä
2024-05-31drm/i915: drop unnecessary i915_reg.h includesJani Nikula
2024-05-31drm/i915: Reuse intel_mode_vblank_start()Ville Syrjälä
2024-03-07drm/i915/dsb: Always set DSB_SKIP_WAITS_ENVille Syrjälä
2024-03-07drm/i915/dsb: Fix DSB vblank waits when using VRRVille Syrjälä
2024-02-23drm/i915/lnl: Program PKGC_LATENCY registerSuraj Kandpal
2024-01-05drm/i915: Disable DSB in Xe KMDJosé Roberto de Souza
2023-11-29drm/i915: correct the input parameter on _intel_dsb_commit()heminhong
2023-11-16drm/i915/dsb: DSB code refactoringAnimesh Manna
2023-10-13drm/i915/dsb: Correct DSB command buffer cache coherency settingsVille Syrjälä
2023-10-13drm/i915/dsb: Allocate command buffer from local memoryVille Syrjälä
2023-09-27drm/i915/dsb: Use DEwake to combat PkgC latencyVille Syrjälä
2023-09-27drm/i915/dsb: Add support for non-posted DSB registers writesVille Syrjälä
generated by cgit v1.2.3 (git 2.0.4) at 2025-11-09 19:08:15 +0000