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path: root/drivers/gpu/drm/i915/display/skl_watermark.c
AgeCommit message (Expand)Author
2025-04-09drm/i915/wm: convert intel_wm.h external interfaces to struct intel_displayJani Nikula
2025-04-04drm/i915: Eliminate intel_compute_sagv_mask()Ville Syrjälä
2025-04-04drm/i915: Skip bw stuff if per-crtc sagv state doesn't changeVille Syrjälä
2025-04-04drm/i915: Make intel_bw_check_sagv_mask() internal to intel_bw.cVille Syrjälä
2025-04-04drm/i915: Extract intel_bw_check_sagv_mask()Ville Syrjälä
2025-04-04drm/i915: Extract intel_bw_modeset_checks()Ville Syrjälä
2025-03-21drm/i915/display: conversions to with_intel_display_rpm()Jani Nikula
2025-03-13drm/i915/display: Convert intel_bw.c externally to intel_displayGustavo Sousa
2025-03-13drm/i915/watermark: Check bounds for scaler_users for dsc prefill latencyAnkit Nautiyal
2025-03-07drm/i915: Move dbuf_state->active_pipes into skl_wm_get_hw_state()Ville Syrjälä
2025-03-07drm/i915: Split wm sanitize from readoutVille Syrjälä
2025-03-07drm/i915: Add skl_wm_plane_disable_noatomic()Ville Syrjälä
2025-03-07drm/i915: clean up pipe's ddb usage in intel_crtc_disable_noatomic()Ville Syrjälä
2025-03-07drm/i915: Extract skl_wm_crtc_disable_noatomic()Ville Syrjälä
2025-02-15drm/i915: s/planar_slave/is_y_plane/Ville Syrjälä
2025-02-11drm/i915: Continue intel_display_power struct intel_display conversionVille Syrjälä
2025-02-10drm/i915: Convert intel_display_power_{get,put}*() to intel_displayVille Syrjälä
2025-01-24drm/i915/dsc: Check if vblank is sufficient for dsc prefillMitul Golani
2025-01-24drm/i915/scaler: Check if vblank is sufficient for scalerMitul Golani
2025-01-23drm/i915/display: fix typos in i915/display filesNitin Gote
2025-01-07drm/i915/display: convert global state to struct intel_displayJani Nikula
2025-01-07drm/i915/display: Adjust Added Wake Time with PKG_C_LATENCYAnimesh Manna
2024-12-16drm/i915/xe3: do not configure auto min dbuf for cursor WMsVinod Govindapillai
2024-12-12drm/i915/xe3: Use hw support for min/interim ddb allocations for async flipStanislav Lisovskiy
2024-12-12drm/i915/display: add a gelper to relative data rate handlingVinod Govindapillai
2024-12-12drm/i915/display: update to plane_wm register access functionVinod Govindapillai
2024-12-05drm/i915/wm: Club initialized variables of same type togetherSuraj Kandpal
2024-12-05drm/i915/wm: Modify latency programmed into PKG_C_LATENCYSuraj Kandpal
2024-12-05drm/i915/display: Refactor DPKGC code to call it from atomic_commit_tailSuraj Kandpal
2024-12-05drm/i915/wm: Use intel_display structure in DPKGC codeSuraj Kandpal
2024-12-05drm/i915/wm: Refactor dpkgc value preprationSuraj Kandpal
2024-12-05drm/i915/wm: Initialize max_latency variable to appropriate valueSuraj Kandpal
2024-11-12drm/i915/display: convert HAS_HW_SAGV_WM() to struct intel_displayJani Nikula
2024-11-12drm/i915/display: convert HAS_SAGV() to struct intel_displayJani Nikula
2024-11-12drm/i915/display: convert HAS_MBUS_JOINING() to struct intel_displayJani Nikula
2024-11-06drm/i915: Simplify xelpdp_is_only_pipe_per_dbuf_bank()Ville Syrjälä
2024-11-06drm/i915: Sanitize MBUS joiningVille Syrjälä
2024-11-06drm/i915: Extract mbus_ctl_join_update()Ville Syrjälä
2024-11-06drm/i915: Extract pipe_mbus_dbox_ctl_update()Ville Syrjälä
2024-11-06drm/i915: Extract pipe_mbus_dbox_ctl()Ville Syrjälä
2024-11-06drm/i915: Relocate the SKL wm sanitation codeVille Syrjälä
2024-10-30drm/i915/display: use x100 version for full version and releaseJani Nikula
2024-10-11drm/i915/xe3lpd: Adjust watermark calculationsMatt Roper
2024-09-11drm/i915/cdclk: Convert CDCLK code to intel_displayVille Syrjälä
2024-09-05drm/i915/display: pass display to intel_crtc_for_pipe()Jani Nikula
2024-09-05drm/i915/display: include media/cec-notifier.h and linux/debugfs.h where neededJani Nikula
2024-08-01drm/i915/dpkgc: Add VRR condition for DPKGC EnablementSuraj Kandpal
2024-05-31drm/i915: Plumb the full atomic state into skl_ddb_add_affected_planes()Ville Syrjälä
2024-05-15drm/i915: Handle SKL+ WM/DDB registers next to all other plane registersVille Syrjälä
2024-05-15drm/i915: Nuke skl_write_wm_level() and skl_ddb_entry_write()Ville Syrjälä
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