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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)Author
2013-02-06drm/i915: Implement WaDisableHiZPlanesWhenMSAAEnabledDaniel Vetter
2013-02-06drm/i915: Disable AsyncFlip performance optimisationsChris Wilson
2013-02-06drm/i915: Correct the bit number for the MI_FLUSH_ENABLE.Eric Anholt
2013-01-03drm/i915: make the panel fitter work on pipes B and C on IVBPaulo Zanoni
2012-10-17drm/i915: Fix GT_MODE default valueBen Widawsky
2012-10-17drm/i915: make sure we write all the DIP data bytesPaulo Zanoni
2012-09-19drm/i915: SDVO hotplug have different interrupt status bits for i915/i965/g4xChris Wilson
2012-06-19drm/i915: fix up ivb plane 3 pageflipsDaniel Vetter
2012-06-10drm/i915: Update GEN6_RP_CONTROL definitionsBen Widawsky
2012-05-31drm/i915: [GEN7] Use HW scheduler for fixed function shadersBen Widawsky
2012-05-11drm/i915: Set the Stencil Cache eviction policy to non-LRA mode.Kenneth Graunke
2012-05-11drm/i915: Force sync command ordering (Gen6+)Ben Widawsky
2012-04-13drm/i915: Sanitize BIOS debugging bits from PIPECONFChris Wilson
2012-03-12drm/i915: gen7: Disable the RHWO optimization as it can cause GPU hangs.Kenneth Graunke
2012-03-12drm/i915: gen7: work around a system hang on IVBEugeni Dodonov
2012-03-12drm/i915: gen7: Implement an L3 caching workaround.Eugeni Dodonov
2012-03-12drm/i915: gen7: implement rczunit workaroundEugeni Dodonov
2011-12-16drm/i915: set the right SDVO transcoder for CPTPaulo Zanoni
2011-11-23drm/i915: Hook up Ivybridge eDPKeith Packard
2011-11-23drm/i915: add multi-threaded forcewake supportKeith Packard
2011-11-16drm/i915: Let panel power sequencing hardware do its jobKeith Packard
2011-11-07drm/i915: Turn on another required clock gating bit on gen6.Eric Anholt
2011-11-07drm/i915: Turn on a required 3D clock gating bit on Sandybridge.Eric Anholt
2011-10-20drm/i915: set watermarks for third pipe on IVBJesse Barnes
2011-10-20drm/i915: fix IVB cursor supportJesse Barnes
2011-10-20drm/i915: PLL macro cleanup and pipe assertion checkJesse Barnes
2011-10-20drm/i915: always set FDI composite sync bitJesse Barnes
2011-10-20drm/i915: Use PIPE_CONTROL for flushing on gen6+.Jesse Barnes
2011-10-20drm/i915: Rename PIPE_CONTROL bit defines to be less terse.Kenneth Graunke
2011-10-20drm/i915: Remove implied length of 2 from GFX_OP_PIPE_CONTROL #define.Kenneth Graunke
2011-10-20Merge branch 'edp-training-fixes' into drm-intel-nextKeith Packard
2011-10-06drm/i915: Correct eDP panel power sequencing delay computationsKeith Packard
2011-09-30drm/i915: Unlock PCH_PP_CONTROL alwaysKeith Packard
2011-09-30drm/i915: Enable digital port hotplug on PCH systemsKeith Packard
2011-09-21drm/i915: Dumb down the semaphore logicBen Widawsky
2011-09-21drm/i915: pass ELD to HDMI/DP audio driverWu Fengguang
2011-09-19Drivers: i915: Fix all space related issues.Akshay Joshi
2011-08-19drm/i915: set GFX_MODE to pre-Ivybridge default value even on IvybridgeJesse Barnes
2011-08-08drm/i915: Fix PCH port pipe select in CPT disable pathsKeith Packard
2011-08-03drm/i915: allow cache sharing policy controlJesse Barnes
2011-08-03drm/i915/hdmi: split infoframe setting from infoframe type codeJesse Barnes
2011-07-29Merge branch 'drm-intel-fixes' into drm-intel-nextKeith Packard
2011-07-29drm/i915: apply phase pointer override on SNB+ tooJesse Barnes
2011-07-29drm/i915/hdmi: send AVI info frames on ILK+ as wellJesse Barnes
2011-07-28Merge branch 'drm-intel-fixes' into drm-intel-nextKeith Packard
2011-07-28drm/i915: apply timing generator bug workaround on CPT and PPTJesse Barnes
2011-07-28drm/i915: DP_PIPE_ENABLED must check transcoder on CPTKeith Packard
2011-07-13drm/i915: Cache GT fifo count for SandyBridgeChris Wilson
2011-07-08drm/i915: Set persistent-mode for ILK/SNB framebuffer compressionChris Wilson
2011-06-28drm/i915: load a ring frequency scaling table v3Jesse Barnes
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