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path: root/drivers/gpu/drm/msm/dsi/phy
AgeCommit message (Expand)Author
2025-10-29drm/msm: dsi: fix PLL init in bonded modeNeil Armstrong
2025-09-09drm/msm/dsi/phy: Fix reading zero as PLL rates when unpreparedKrzysztof Kozlowski
2025-09-02drm/msm/dsi/phy_7nm: Fix missing initial VCO rateKrzysztof Kozlowski
2025-09-02drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfieldsKrzysztof Kozlowski
2025-09-02drm/msm/dsi/phy: Toggle back buffer resync after preparing PLLKrzysztof Kozlowski
2025-08-29drm/msm/dsi_phy_7nm: convert from round_rate() to determine_rate()Brian Masney
2025-08-29drm/msm/dsi_phy_28nm: convert from round_rate() to determine_rate()Brian Masney
2025-08-29drm/msm/dsi_phy_28nm_8960: convert from round_rate() to determine_rate()Brian Masney
2025-08-29drm/msm/dsi_phy_14nm: convert from round_rate() to determine_rate()Brian Masney
2025-08-29drm/msm/dsi_phy_10nm: convert from round_rate() to determine_rate()Brian Masney
2025-08-13drm/msm/dsi: Fix 14nm DSI PHY PLL Lock issueLoic Poulain
2025-07-04drm/msm/dsi/phy: Add support for SM8750Krzysztof Kozlowski
2025-06-09drm/msm/dsi/dsi_phy_10nm: Fix missing initial VCO rateKrzysztof Kozlowski
2025-05-02drm/msm/dsi: add DSI PHY configuration on SA8775PAyushi Makhija
2025-05-02drm/msm/dsi/phy: add configuration for SAR2130PDmitry Baryshkov
2025-02-26drm/msm/dsi/phy: Define PHY_CMN_CLK_CFG[01] bitfields and simplify savingKrzysztof Kozlowski
2025-02-26drm/msm/dsi/phy: Use dsi_pll_cmn_clk_cfg1_update() when registering PLLKrzysztof Kozlowski
2025-02-26drm/msm/dsi/phy: Program clock inverters in correct registerKrzysztof Kozlowski
2025-02-26drm/msm/dsi/phy: Use the header with clock IDsKrzysztof Kozlowski
2025-02-15drm/msm/dsi/phy: Do not overwite PHY_CMN_CLK_CFG1 when choosing bitclk sourceKrzysztof Kozlowski
2025-02-15drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG1 against clock driverKrzysztof Kozlowski
2025-02-15drm/msm/dsi/phy: Protect PHY_CMN_CLK_CFG0 updated from driver sideKrzysztof Kozlowski
2024-12-15drm/msm/dsi: Add dsi phy support for SM6150Li Liu
2024-09-02drm/msm/dsi: correct programming sequence for SM8350 / SM8450Dmitry Baryshkov
2024-06-25drm/msm/dsi: Add phy configuration for MSM8937Daniil Titov
2024-06-23drm/msm/dsi: Remove dsi_phy_write_[un]delay()Konrad Dybcio
2024-06-23drm/msm/dsi: Remove dsi_phy_read/write()Konrad Dybcio
2024-04-22drm/msm: Drop msm_read/writelKonrad Dybcio
2023-12-10Merge remote-tracking branch 'drm-misc/drm-misc-next' into msm-nextRob Clark
2023-12-05drm/msm: dsi: add support for DSI-PHY on SM8650Neil Armstrong
2023-12-03drm/msm/dsi: Enable runtime PMKonrad Dybcio
2023-12-03drm/msm/dsi: Use pm_runtime_resume_and_get to prevent refcnt leaksKonrad Dybcio
2023-11-16drm/msm/dsi: use the correct VREG_CTRL_1 value for 4nm cphyJonathan Marek
2023-07-27drm/msm/dsi: Reuse QCM2290 14nm DSI PHY configuration for SM6125Marijn Suijten
2023-07-27drm/msm/dsi: Drop unused regulators from QCM2290 14nm DSI PHY configMarijn Suijten
2023-06-04drm/msm/dsi: Add phy configuration for MSM8226Luca Weiss
2023-05-21drm/msm/dsi: don't allow enabling 14nm VCO with unprogrammed rateDmitry Baryshkov
2023-01-22drm/msm/dsi: correct byte intf clock rate for 14nm DSI PHYDmitry Baryshkov
2023-01-22drm/msm/dsi: Add phy configuration for SM6375Konrad Dybcio
2023-01-22drm/msm/dsi: add support for DSI-PHY on SM8550Neil Armstrong
2023-01-22drm/msm/dsi: add support for DSI-PHY on SM8350 and SM8450Dmitry Baryshkov
2023-01-09drm/msm/dsi/phy: rework register setting for 7nm PHYDmitry Baryshkov
2022-11-04drm/msm/dsi: Add phy configuration for QCM2290Loic Poulain
2022-09-18drm/msm/dsi: Improve dsi_phy_driver_probe() probe error handlingDouglas Anderson
2022-09-18drm/msm/dsi: Take advantage of devm_regulator_bulk_get_const()Douglas Anderson
2022-09-18drm/msm/dsi: Use the new regulator bulk feature to specify the loadDouglas Anderson
2022-09-18drm/msm/dsi: Don't set a load before disabling a regulatorDouglas Anderson
2022-09-18drm/msm/dsi_phy_7nm: Replace parent names with clk_hw pointersMarijn Suijten
2022-09-18drm/msm/dsi_phy_10nm: Replace parent names with clk_hw pointersMarijn Suijten
2022-09-18drm/msm/dsi_phy_14nm: Replace parent names with clk_hw pointersMarijn Suijten
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