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2026-08-19Merge tag 'iio-for-7.3a' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next Jonathan writes: IIO new device support, features, cleanup for 7.3 Includes a merge of 7.2-rc2 to pick up the changes around mod_devicetable.h and reduce resulting conflicts around includes. New device support ------------------ adi,ad3530R - Add support for the AD3532R and AD3532 16 channel DACs. adi,ad4080 - Add support for the AD4883 ADC. adi,ad5686 - Add support for AD5313R, AD5317R, AD5674, AD5687R, AD5689, AD5689R DACs over SPI - Add support for AD5316R, AD5674, AD5697R and AD5696 DACs over I2C - Significant driver refactoring prior to these additions, partly to reduce bus traffic and to add triggered buffer and gain control support. An earlier set added support for missing supplies, reset and LDAC GPIO. adi,adf41513 - New driver to support this PLL frequency synthesizer that runs up to 26.5 GHz. - Included infrastructure to handle higher precision attributes with extensive tests adi,ltc2378-20 - New driver supporting LTC2338, LTC2364, LTC2367, LTC2368, LT2369, LTC2370 LTC2376, LTC2377, LTC2378, LTC2379 and LTC23980 ADCs with both high speed capture via appropriate backend and conventional triggered buffer SPI capture. invensense,icm42607 - New driver for this IMU. mediateck,mt6323 - New driver for this PMIC ADC. microchip,mcp47a1 - New driver for this I2C 6 bit DAC. nxp,mcf54415-dac - New driver for this DAC found in NXP SoCs. qst,qmc5884l - New driver for this 3 axis magnetometer. Included dt vendor entry for qst. qst,qmc6308 - New driver for this 3 axis magnetometer. sensiron,slf3s - New driver for this liquid flow sensor. Includes adding IIO_VOLUMEFLOW channel type. st,vl53l1x - Refactors to improve readability. ti,ads112c14 - New driver supporting the ADS112C14 and ADS122C14 ADCs. These bring some new ABI for input chopping, particular useful for resistive sensors like thermocouples or Wheatstone bridges. - Support CRC8 detection of corruption on the bus. - Support buffered reads. ti,tmp117 - (trivial) Add support for the tmp119 temperature sensor. xilinx,versal-sysmon - New ADC driver for this block found on various FPGAs including various bus interfaces, threshold and oversampling support. dt binding updates ------------------ new shared bindings - excitation-channels and excitation-current-nanoamp allow per channel specification of currents used for resistive sensor measurement. - reference-sources property to allow selection of a per channel reference. rockchip,saradc - Add RV1106 which is compatible with the RV3588. Features -------- buffer-dmaengine - Allow cyclic buffers, useful for repeating sequence generation with DACs. devantech,dmard09 - Implement read back of channel scale - previously interface always returned an error. hid,sensors-als - Enable separate channel scaling for hardware that supports it. invensense,timestamp library - Various precision improvements. invensense,icm42600 - Add support for hwfifo watermark interfaces. taos,tcs3472 - Support wait time and sampling frequency control. Cleanups, minor fixes --------------------- Minor cleanups not mentioned at all in this summary such as white space fixes or typos. Affecting various drivers - Cleanup of conditionals that had no affect. - Drop some runtime pm local wrappers as now runtime_pm does the mark_last_busy part inside the put, these provide no useful code deduplication or readability advantages over directly calling the runtime_pm functions. - Return 0 from write_raw() on success. - Use of dev_err_probe() to simplify code and sometimes provide useful info for deferred probe debugging. - Drop some redundant error prints where the called function already provides information on errors. - Make some read only arrays in functions static. - Fix up missing handling of regcache_sync() errors. - Drop some false kernel-doc markings. - Add missing MODULE_DEVICE_TABLE for some of_match_id tables. - Use local variables for things like the struct device to shorten and improve readability of code. - Drop some unused structure elements. - Reorder dds.h macro parameters to be inline with others. - Header reorders and IWYU. Often part of a more significant series. - Remove abstractions designed to allow a driver to support multiple device types, when they have been around a long time and only the original part showed up. - Initialize spi_device_id arrays using member names following dropping of driver data from drivers that didn't actually use it. - Catch up with i2c_device_id tables added since previous effort to use named initializers for all those. - Use kernel types in a few places instead of standard C ones or bare unsigned. Misc - Update Xilinx AMS maintainer. - Update email address for Maxwell Doose. - Update email address for Siratul Islam. - Update email address for Tomasz Duszynski and re-add Tomasz to various maintainer entries. Docs - Encourage use of differential channel naming even when there is no flexibility in input to differential pair mapping. Intended to provide a strong signal to userspace that a channel is differential. adi,ad_sigma_delta - Allow COMPILE_TEST without any users. adi,ad2s1201 - Refactor trigger handler to avoid mix of guard() and goto. adi,ad5686 - Avoid potential NULL dereference is user forces a driver bind. adi,ad5696 - Add a couple of missing entries to the of_match_id table and update binding to match. atmel,ad91_adc - Use const char * for DT string property allowing a cast to be dropped. avia,hx711 - Various refactors and cleanup to enable support of additional parts (to come) - Add missing supply and gpio dt-bindings. bosch,bmc150 - Harden against device reporting too large a FIFO sample count. - Use FIELD_PREP() / FIELD_GET() to improve readability. freescale,fxls8962af - Harden against device reporting too large a FIFO sample count. hid-sensors-* - Reorder probe to not expose userspace interfaces until the rest of the setup is done to avoid potentially dropping data. honeywell,abp2030pa - Drop an unreachable return. invensens,icm45600 - Harden against bad value of FIFO sample count from device. - Use i2c_match_data if firmware table sourced match data isn't available. nxp,mpl1115 - Ensure runtime_pm is balanced on error in probe. rohm,bm1390 - Make the driver slightly more likely to recover from transient errors. sensiron,sgp30 - Handle thread creation errors. st,lsm6dsx - Update the enable mask when doing sensor fusion to avoid incorrect fifo data handling. st,stm32-dfsdm - Treat dt flags as booleans. ti,ads1015 - Switch to devm helpers which simplified code and closed a resource leak. ti,opt3001 - Split complicated opt3001_get_processed() logic into irq an no irq helper functions. - Use devm to simplify code. - Use guard() to simplify code. - Reorder probe so final call exposes userspace interfaces. - Various other more minor cleanup taos,tsl2772 - Fix calibscale readback to check right channel type. taos,tsl2583 - Use sysfs_emit() and sysfs_emit_at() to replace open coded equivalents. * tag 'iio-for-7.3a' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (232 commits) iio: dac: mcp47a1: add support for new device dt-bindings: iio: dac: add support for mcp47a1 iio: Update email for Maxwell Doose iio: imu: st_lsm6dsx: Update enable mask when using sensor fusion iio: light: cm32181: return zero after writing calibscale iio: flow: add Sensirion SLF3S liquid flow sensor driver iio: core: add IIO_VAL_DECIMAL64_FEMTO format type dt-bindings: iio: flow: add Sensirion SLF3S liquid flow sensor iio: types: add IIO_VOLUMEFLOW channel type iio: ABI: Encourage differential voltage ABI usage iio: adc: ltc2378: Add support for LTC2338-18 iio: adc: ltc2378: Enable triggered buffer data capture iio: adc: ltc2378: Enable high-speed data capture iio: adc: ltc2378: Add support for LTC2378-20 and similar ADCs dt-bindings: iio: adc: Add ltc2378 iio: magnetometer: ak8974: remove conditional return with no effect iio: light: tsl2583: remove conditional return with no effect iio: adc: rcar-gyroadc: remove rcar_gyroadc_set_power() helper iio: light: vcnl4000: remove vcnl4000_set_pm_runtime_state() helper iio: light: vcnl4035: remove vcnl4035_set_pm_runtime_state() helper ...
2026-08-03iio: adc: ltc2378: Enable triggered buffer data captureMarcelo Schmitt
Enable users to run triggered data captures with LTC2378 and similar ADCs. Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
2026-08-03iio: adc: ltc2378: Enable high-speed data captureMarcelo Schmitt
Make use of SPI transfer offloading to speed up data capture, enabling data acquisition at faster sample rates (up to 2 MSPS). Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
2026-08-03iio: adc: ltc2378: Add support for LTC2378-20 and similar ADCsMarcelo Schmitt
Support for LTC2378-20 and similar analog-to-digital converters. Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
2026-08-03iio: adc: ti-ads112c14: add support for I2C CRC8David Lechner (TI)
Add support for I2C CRC8 to the TI ADS112C14 ADC driver. This verifies data integrity of all I2C transactions with the device. For now, it is always enabled, but it could be made optional in the future if needed (e.g. for higher-speed data acquisition). Signed-off-by: David Lechner (TI) <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
2026-07-20iio: adc: add ti-ads112c14 driverDavid Lechner (TI)
Add a new driver for the TI ADS112C14/ADS122C14 ADC chips. This first step is adding a very basic driver that only supports power on/reset and reading the system monitor channels. ADS112C14_SYS_MON_CHANNEL_SHORT is the last channel rather than being in logical order by address to keep the voltage channels together and in case we find we need to add variants of this channel with different voltage reference later. Signed-off-by: David Lechner (TI) <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
2026-07-10iio: adc: max14001: add missing 'select REGMAP' to KconfigJoshua Crofts
The Kconfig entry for the MAX14001 is missing a 'select REGMAP', causing build failures. Fixes: 59795109fa67 ("iio: adc: max14001: New driver") Cc: stable@vger.kernel.org Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
2026-07-10iio: adc: max34408: add missing 'select REGMAP_I2C' to KconfigJoshua Crofts
The Kconfig entry for the MAX34408 is missing a 'select REGMAP_I2C', causing build failures. Fixes: cf27775838c5 ("iio: adc: Add driver support for MAX34408/9") Cc: stable@vger.kernel.org Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
2026-07-02iio: adc: ad7779: add missing 'select IIO_TRIGGERED_BUFFER' to KconfigJoshua Crofts
The Kconfig entry for the AD7779 is missing a 'select IIO_TRIGGERED_BUFFER' parameter, causing build failures. Fixes: c9a3f8c7bfcb ("drivers: iio: adc: add support for ad777x family") Cc: stable@vger.kernel.org Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com> Tested-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-07-02iio: adc: ad4130: add missing `select IIO_TRIGGERED_BUFFER` to KconfigJoshua Crofts
The Kconfig entry is missing a `select IIO_TRIGGERED_BUFFER` parameter, causing potential build failures. Fixes: ec98c3b50157 ("iio: adc: ad4130: add new supported parts") Cc: stable@vger.kernel.org Signed-off-by: Joshua Crofts <joshua.crofts1@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-07-02iio: adc: versal-sysmon: add I2C driverSalih Erim
Add an I2C transport driver for the Versal SysMon block. The SysMon provides an I2C slave interface that allows an external master to read voltage and temperature measurements through the same register map used by the MMIO path. The I2C command frame is an 8-byte structure containing a 4-byte data payload, a 2-byte register offset, and a 1-byte instruction field. Read operations send the frame with a read instruction, then receive a 4-byte response containing the register value. Events are not supported on the I2C path because there is no interrupt line and the I2C regmap backend cannot be called from atomic context. Co-developed-by: Conall O'Griofa <conall.ogriofa@amd.com> Signed-off-by: Conall O'Griofa <conall.ogriofa@amd.com> Signed-off-by: Salih Erim <salih.erim@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-07-02iio: adc: add Versal SysMon driverSalih Erim
Add the core driver and MMIO platform driver for the AMD/Xilinx Versal System Monitor (SysMon) block. The SysMon block resides in the platform management controller (PMC) and provides on-chip voltage and temperature monitoring through a 10-bit, 200 kSPS ADC. It can monitor up to 160 voltage channels and 64 temperature satellites distributed across the SoC, with a consistent sample rate of 8 kSPS per channel regardless of how many channels are enabled. The hardware also provides four aggregate temperature registers that are always present regardless of the device tree configuration: the current max and min across all active satellites, and the peak and trough values recorded since the last hardware reset. The driver is split into two compilation units: - versal-sysmon-core: Channel parsing, IIO registration, read_raw - versal-sysmon: MMIO platform driver with custom regmap accessors Voltage results are stored in a 19-bit modified floating-point format and converted to millivolts. Temperature results are stored in Q8.7 signed fixed-point Celsius format and converted to millicelsius. The MMIO regmap backend uses a custom reg_write accessor that automatically unlocks the NPI (NoC programming interface) lock register before each write, as required by the hardware. The regmap is configured with fast_io since the underlying MMIO accessors are safe to call from atomic context. Co-developed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Salih Erim <salih.erim@amd.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-07-02iio: adc: mt6323-auxadc: add mt6323 PMIC AUXADC driverRoman Vivchar
The mt6323 AUXADC is a 15-bit ADC used for system monitoring. This driver provides support for reading various channels including battery and charger voltages, battery and chip temperature, current sensing and accessory detection. Add a driver for the AUXADC found in the MediaTek mt6323 PMIC. Tested-by: Ben Grisdale <bengris32@protonmail.ch> # Amazon Echo Dot (2nd Generation) Signed-off-by: Roman Vivchar <rva333@protonmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30iio: adc: ad_sigma_delta: allow COMPILE_TEST in isolationRadu Sabau
AD_SIGMA_DELTA is a hidden tristate that can only be enabled by selecting drivers (AD7124, AD7192, etc.), all of which require SPI. This prevents compile-testing the library code directly with allmodconfig or by manually enabling it with COMPILE_TEST. Add a prompt string guarded by "if COMPILE_TEST" so the symbol becomes directly selectable when COMPILE_TEST is set. Also add an explicit "depends on SPI" since the ad_sigma_delta library directly calls SPI core symbols such as spi_bus_lock(), spi_bus_unlock(), and spi_sync_locked(). Signed-off-by: Radu Sabau <radu.sabau@analog.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-29iio: adc: ad7380: select REGMAPSamuel Moelius
The AD7380 driver uses generic regmap types and APIs. However, its Kconfig entry does not select REGMAP. As a result, AD7380 can be enabled from an allnoconfig-derived config with SPI_MASTER=y while REGMAP remains unset, causing ad7380.o to fail to build. Fixes: b095217c104b ("iio: adc: ad7380: new driver for AD7380 ADCs") Signed-off-by: Samuel Moelius <samuel.moelius@trailofbits.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-14Merge tag 'iio-fixes-for-7.1b' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next IIO: 2nd set of fixes for the 7.1 cycle. Usual mixed bag of ancient issues and the recently introduced. Various drivers - Ensure use of simple_write_to_buffer() in debugfs callbacks doesn't result in reading off the end of intended data by checking the position is always 0. buffer/hw-consumer - Ensure scan_mask is freed on buffer release. acpi-als - Check ACPI_COMPANION() against NULL to close corner case where a driver is overridden. adi,ad4062 - Add GPIOLIB dependency to avoid undefined ref to gpiochip_get_data() adi.ad7768-1 - Add GPIOLIB dependency to avoid several undefined functions. adi,ad2s1210 - Ensure possible recovery path if a read fails in the interrupt handler. bosch,bmg160 - Increase sleep on startup to ensure device is ready. bosch,bmp280 - Ensure buffer pushed to kfifo is zeroed to avoid leaking uninitialized stack data to userspace. dyna-image,al3010 - Fix refactor that stopped reading one of the two measurement registers. dyna-image,al3320a - Fix refactor that stopped reading one of the two measurement registers. qcom,spmi-iadc - Ensure disable_irq_wake() is called on remove path. sensiron,scd30 - Fix a sign extension bug. st,vl5310x - Ensure possible recovery path if a read fails in the interrupt handler. ti,adc1298 - Bounds check for pga_settings index. Hardening against device returning unexpected values. ti,tmp006 - Ensure trigger correctly released on remove path. vishay,veml6030 - Fix incorrect channel type in events. vishay,veml6074 - Bounds check for veml6075_it_ms. Hardening against device returning unexpected values. * tag 'iio-fixes-for-7.1b' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (23 commits) iio: adc: ad_sigma_delta: fix clear_pending_event for registerless devices iio: adc: ad_sigma_delta: fix CS held asserted and state leaks iio: light: opt3001: fix missing state reset on timeout iio: chemical: scd30: Cleanup initializations and fix sign-extension bug iio: core: fix uninitialized data in debugfs iio: backend: fix uninitialized data in debugfs iio: dac: ad3552r-hs: fix uninitialized data ni ad3552r_hs_write_data_source() iio: adc: qcom-spmi-iadc: balance enable_irq_wake() on driver unbind iio: light: al3320a: read both ALS ADC registers again iio: light: al3010: read both ALS ADC registers again iio: temperature: tmp006: use devm_iio_trigger_register iio: buffer: hw-consumer: free scan_mask on buffer release iio: adc: ad7768-1: Select GPIOLIB iio: light: veml6030: fix channel type when pushing events iio: light: acpi-als: Check ACPI_COMPANION() against NULL iio: resolver: ad2s1210: notify trigger and clear state on fault read error iio: proximity: vl53l0x: notify trigger and clear IRQ on error paths iio: gyro: bmg160: wait full startup time after mode change at probe iio: gyro: bmg160: bail out when bandwidth/filter is not in table iio: pressure: bmp280: zero-init bmp580 trigger handler buffer ...
2026-05-31iio: adc: ad4691: add SPI offload supportRadu Sabau
Add SPI offload support to enable DMA-based, CPU-independent data acquisition using the SPI Engine offload framework. When an SPI offload is available (devm_spi_offload_get() succeeds), the driver registers a DMA engine IIO buffer and uses dedicated buffer setup operations. If no offload is available the existing software triggered buffer path is used unchanged. Both CNV Burst Mode and Manual Mode support offload, but use different trigger mechanisms: CNV Burst Mode: the SPI Engine is triggered by the ADC's DATA_READY signal on the GP pin specified by the trigger-source consumer reference in the device tree (one cell = GP pin number 0-3). For this mode the driver acts as both an SPI offload consumer (DMA RX stream, message optimization) and a trigger source provider: it registers the GP/DATA_READY output via devm_spi_offload_trigger_register() so the offload framework can match the '#trigger-source-cells' phandle and automatically fire the SPI Engine DMA transfer at end-of-conversion. Manual Mode: the SPI Engine is triggered by a periodic trigger at the configured sampling frequency. The pre-built SPI message uses the pipelined CNV-on-CS protocol: N+1 16-bit transfers are issued for N active channels (the first result is discarded as garbage from the pipeline flush) and the remaining N results are captured by DMA. All offload transfers use 16-bit frames (bits_per_word=16, len=2). The SPI Engine assembles received bits into native 16-bit words before DMA, so offload samples land in CPU-native byte order (IIO_CPU). Dedicated channel arrays (AD4691_OFFLOAD_CHANNEL) reflect this: they omit IIO_BE and carry no soft timestamp (DMA delivers data directly to userspace). The software triggered-buffer path retains its IIO_BE channels because bits_per_word=8 causes SPI to deliver bytes MSB-first into memory, making the on-disk layout big-endian. Both paths use storagebits=16 as transfers are 16 bits wide in both cases. IIO_BUFFER_DMAENGINE is selected because the offload path uses devm_iio_dmaengine_buffer_setup_with_handle() to allocate and attach the DMA RX buffer to the IIO device. Signed-off-by: Radu Sabau <radu.sabau@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad4691: add triggered buffer supportRadu Sabau
Add buffered capture support using the IIO triggered buffer framework. CNV Burst Mode: the GP pin identified by interrupt-names in the device tree is configured as DATA_READY output. The IRQ handler stops conversions and fires the IIO trigger; the trigger handler executes a pre-built SPI message that reads all active channels from the AVG_IN accumulator registers and then resets accumulator state and restarts conversions for the next cycle. Manual Mode: CNV is tied to SPI CS so each transfer simultaneously reads the previous result and starts the next conversion (pipelined N+1 scheme). At preenable time a pre-built, optimised SPI message of N+1 transfers is constructed (N channel reads plus one NOOP to drain the pipeline). The trigger handler executes the message in a single spi_sync() call and collects the results. An external trigger (e.g. iio-trig-hrtimer) is required to drive the trigger at the desired sample rate. Both modes share the same trigger handler and push a complete scan — one big-endian 16-bit (__be16) slot per active channel, densely packed in scan_index order, followed by a timestamp. The CNV Burst Mode sampling frequency (PWM period) is exposed as a buffer-level attribute via IIO_DEVICE_ATTR. Signed-off-by: Radu Sabau <radu.sabau@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-31iio: adc: ad4691: add initial driver for AD4691 familyRadu Sabau
Add support for the Analog Devices AD4691 family of high-speed, low-power multichannel SAR ADCs: AD4691 (16-ch, 500 kSPS), AD4692 (16-ch, 1 MSPS), AD4693 (8-ch, 500 kSPS) and AD4694 (8-ch, 1 MSPS). The driver implements a custom regmap layer over raw SPI to handle the device's mixed 1/2/3/4-byte register widths and uses the standard IIO read_raw/write_raw interface for single-channel reads. The chip idles in Autonomous Mode so that single-shot read_raw can use the internal oscillator without disturbing the hardware configuration. Three voltage supply domains are managed: avdd (required), vio, and a reference supply on either the REF pin (ref-supply, external buffer) or the REFIN pin (refin-supply, uses the on-chip reference buffer; REFBUF_EN is set accordingly). Hardware reset is performed by asserting then deasserting the reset-gpios GPIO line (tRESETL minimum pulse width is 10 ns, satisfied by function-call overhead); the driver then waits 300 µs for the chip to complete its internal reset sequence. A software reset via SPI_CONFIG_A is used as fallback when no reset GPIO is provided. Accumulator channel masking for single-shot reads uses ACC_MASK_REG via an ADDR_DESCENDING SPI write, which covers both mask bytes in a single 16-bit transfer. Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Radu Sabau <radu.sabau@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-26iio: adc: ad7768-1: Select GPIOLIBJonathan Cameron
This driver provides a gpio chip a some related functions are not stubbed if GPIOLIB is not built. ad7768-1.c:420: undefined reference to `gpiochip_get_data' ad7768-1.c:498: undefined reference to `devm_gpiochip_add_data_with_key' Dual sign off reflects change of affiliation whilst this was under review. Fixes: d569ae0f052e ("iio: adc: ad7768-1: Add GPIO controller support") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202512271235.WwAmAbOa-lkp@intel.com/ Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Stable@vger.kernel.org Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-05-15iio: adc: ad4062: add GPIOLIB dependencyArnd Bergmann
The ad4062 driver gained support for the gpiochip and now fails to build when GPIOLIB is disabled: 390-linux-ld: drivers/iio/adc/ad4062.o: in function `ad4062_gpio_get': drivers/iio/adc/ad4062.c:1383:(.text+0x3dc): undefined reference to `gpiochip_get_data` Add a Kconfig dependency for this. Fixes: da1d3596b1e4 ("iio: adc: ad4062: Add GPIO Controller support") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-04-27iio: adc: qcom: Unify user-visible "Qualcomm" nameKrzysztof Kozlowski
Various names for Qualcomm as a company are used in user-visible config options: QCOM, Qualcomm and Qualcomm Technologies. Switch to unified "Qualcomm" so it will be easier for users to identify the options when for example running menuconfig. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-03-01iio: adc: ad7768-1: add support for SPI offloadJonathan Santos
The AD7768-1 family supports sampling rates up to 1 MSPS, which exceeds the capabilities of conventional triggered buffer operations due to SPI transaction overhead and interrupt latency. Add SPI offload support to enable hardware-accelerated data acquisition that bypasses software SPI transactions using continuous data streaming. Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2026-03-01iio: adc: ad4030: Add SPI offload supportMarcelo Schmitt
AD4030 and similar ADCs can capture data at sample rates up to 2 mega samples per second (MSPS). Not all SPI controllers are able to achieve such high throughputs and even when the controller is fast enough to run transfers at the required speed, it may be costly to the CPU to handle transfer data at such high sample rates. Add SPI offload support for AD4030 and similar ADCs to enable data capture at maximum sample rates. Note that a pair of PWM devices are used for the supported setup. One of the PWM goes to the ADC CNV pin to initiate conversions while the other PWM is connected to the SPI offload trigger to signal when to fetch data from the peripheral. Note also that the PWMs must be somewhat synchronized such to make the controller run transfers only when ADC sample data is available. See Documentation/iio/ad4030.rst for details. Reviewed-by: David Lechner <dlechner@baylibre.com> Co-developed-by: Trevor Gamblin <tgamblin@baylibre.com> Signed-off-by: Trevor Gamblin <tgamblin@baylibre.com> Co-developed-by: Axel Haslam <ahaslam@baylibre.com> Signed-off-by: Axel Haslam <ahaslam@baylibre.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2026-02-23iio: adc: Add support for QCOM PMIC5 Gen3 ADCJishnu Prakash
The ADC architecture on PMIC5 Gen3 is similar to that on PMIC5 Gen2, with all SW communication to ADC going through PMK8550 which communicates with other PMICs through PBS. One major difference is that the register interface used here is that of an SDAM (Shared Direct Access Memory) peripheral present on PMK8550. There may be more than one SDAM used for ADC5 Gen3 and each has eight channels, which may be used for either immediate reads (same functionality as previous PMIC5 and PMIC5 Gen2 ADC peripherals) or recurring measurements (same as ADC_TM functionality). By convention, we reserve the first channel of the first SDAM for all immediate reads and use the remaining channels across all SDAMs for ADC_TM monitoring functionality. Add support for PMIC5 Gen3 ADC driver for immediate read functionality. ADC_TM is implemented as an auxiliary thermal driver under this ADC driver. Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2026-01-22iio: adc: ad7768-1: add support for ADAQ776x-1 ADC FamilyJonathan Santos
Add support for ADAQ7767/68/69-1 series, which includes PGIA and Anti-aliasing filter (AAF) gains. Unlike the AD7768-1, they do not provide a VCM regulator interface. The PGA gain is configured in run-time through the scale attribute, if supported by the device. PGA is controlled by GPIOs provided in the device tree. The AAF gain is defined by hardware connections and should be specified in the device tree. Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2026-01-11iio: adc: Initial support for AD4134Marcelo Schmitt
AD4134 is a 24-bit, 4-channel, simultaneous sampling, precision analog-to-digital converter (ADC). The device can be managed through SPI or direct control of pin logical levels (pin control mode). The AD4134 design also features a dedicated bus for ADC sample data output. Though, this initial driver for AD4134 only supports usual SPI connections. Add basic support for AD4134 that enables single-shot ADC sample read. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-12-31iio: adc: ad4062: Add IIO Trigger supportJorge Marques
Adds support for IIO Trigger. Optionally, gp1 is assigned as Data Ready signal, if not present, fallback to an I3C IBI with the same role. The software trigger is allocated by the device, but must be attached by the user before enabling the buffer. The purpose is to not impede removing the driver due to the increased reference count when iio_trigger_set_immutable() or iio_trigger_get() is used. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-12-31iio: adc: Add support for ad4062Jorge Marques
The AD4060/AD4062 are versatile, 16-bit/12-bit, successive approximation register (SAR) analog-to-digital converter (ADC) with low-power and threshold monitoring modes. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-12-21iio: adc: Add ti-ads1018 driverKurt Borja
Add ti-ads1018 driver for Texas Instruments ADS1018 and ADS1118 SPI analog-to-digital converters. This chips' MOSI pin is shared with a data-ready interrupt. Defining this interrupt in devicetree is optional, therefore we only create an IIO trigger if one is found. Handling this interrupt requires some considerations. When enabling the trigger the CS line is tied low (active), thus we need to hold spi_bus_lock() too, to avoid state corruption. This is done inside the set_trigger_state() callback, to let users use other triggers without wasting a bus lock. Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Kurt Borja <kuurtb@gmail.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-12-21iio: adc: Add the NXP SAR ADC support for the s32g2/3 platformsDaniel Lezcano
The NXP S32G2 and S32G3 platforms integrate a successive approximation register (SAR) ADC. Two instances are available, each providing 8 multiplexed input channels with 12-bit resolution. The conversion rate is up to 1 Msps depending on the configuration and sampling window. The SAR ADC supports raw, buffer, and trigger modes. It can operate in both single-shot and continuous conversion modes, with optional hardware triggering through the cross-trigger unit (CTU) or external events. An internal prescaler allows adjusting the sampling clock, while per-channel programmable sampling times provide fine-grained trade-offs between accuracy and latency. Automatic calibration is performed at probe time to minimize offset and gain errors. All modes have been validated on the S32G274-RDB2 platform using an externally generated square wave captured by the ADC. Tests covered buffered streaming via IIO, trigger synchronization, and accuracy verification against a precision laboratory signal source. One potential scenario, not detected during testing, is that in some corner cases the DMA may already have been armed for the next transfer, which can lead dmaengine_tx_status() to return an incorrect residue. The callback_result() operation—intended to supply the residue directly and eliminate the need to call dmaengine_tx_status()—also does not work. Attempting to use dmaengine_pause() and dmaengine_resume() to prevent the residue from being updated does not work either. This potential scenario should apply to any driver using cyclic DMA. However, no current driver actually handles this case, and they all rely on the same acquisition routine (e.g., the STM32 implementation). The NXP SAR acquisition routine has been used in production for several years, which is a good indication of its robustness. As the IIO is implementing the cyclic DMA support API, it is not worth to do more spins to the current routine as it will go away when the new API will be available. The driver is derived from the BSP implementation and has been partly rewritten to comply with upstream requirements. For this reason, all contributors to the original code are listed as co-developers. Originally-by: Stefan-Gabriel Mirea <stefan-gabriel.mirea@nxp.com> Co-developed-by: Alexandru-Catalin Ionita <alexandru-catalin.ionita@nxp.com> Signed-off-by: Alexandru-Catalin Ionita <alexandru-catalin.ionita@nxp.com> Co-developed-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Signed-off-by: Ciprian Costea <ciprianmarian.costea@nxp.com> Co-developed-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Signed-off-by: Radu Pirea (NXP OSS) <radu-nicolae.pirea@oss.nxp.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-12-21iio: adc: Add TI ADS131M0x ADC driverDavid Jander
Add a new IIO ADC driver for Texas Instruments ADS131M0x devices (ADS131M02/03/04/06/08). These are 24-bit, up to 64 kSPS, simultaneous- sampling delta-sigma ADCs accessed via SPI. Highlights: - Supports 2/3/4/6/8-channel variants with per-channel RAW and SCALE. - Implements device-required full-duplex fixed-frame transfers. - Handles both input and output CRC Note: Despite the almost identical name, this hardware is not compatible with the ADS131E0x series handled by drivers/iio/adc/ti-ads131e08.c. Signed-off-by: David Jander <david@protonic.nl> Co-developed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-11-09iio: adc: Add support for the Renesas RZ/N1 ADCHerve Codina (Schneider Electric)
The Renesas RZ/N1 ADC controller is the ADC controller available in the Renesas RZ/N1 SoCs family. It can use up to two internal ADC cores (ADC1 and ADC2) those internal cores are not directly accessed but are handled through ADC controller virtual channels. Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@bootlin.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-20iio: adc: max14001: New driverMarilene Andrade Garcia
The MAX14001/MAX14002 is configurable, isolated 10-bit ADCs for multi-range binary inputs. In addition to ADC readings, the MAX14001/MAX14002 offers more features, like a binary comparator, a filtered reading that can provide the average of the last 2, 4, or 8 ADC readings, and an inrush comparator that triggers the inrush current. There is also a fault feature that can diagnose seven possible fault conditions. And an option to select an external or internal ADC voltage reference. MAX14001/MAX14002 features implemented so far: - Raw ADC reading. - MV fault disable. - Selection of external or internal ADC voltage reference, depending on whether it is declared in the device tree. Co-developed-by: Kim Seer Paller <kimseer.paller@analog.com> Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com> Signed-off-by: Marilene Andrade Garcia <marilene.agarcia@gmail.com> Tested-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Reviewed-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-10-19iio: adc: add RZ/T2H / RZ/N2H ADC driverCosmin Tanislav
Add support for the A/D 12-Bit successive approximation converters found in the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs. RZ/T2H has two ADCs with 4 channels and one with 6. RZ/N2H has two ADCs with 4 channels and one with 15. Conversions can be performed in single or continuous mode. Result of the conversion is stored in a 16-bit data register corresponding to each channel. The conversions can be started by a software trigger, a synchronous trigger (from MTU or from ELC) or an asynchronous external trigger (from ADTRGn# pin). Only single mode with software trigger is supported for now. Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-09-15iio: adc: Support ROHM BD79112 ADC/GPIOMatti Vaittinen
The ROHM BD79112 is an ADC/GPIO with 32 channels. The channel inputs can be used as ADC or GPIO. Using the GPIOs as IRQ sources isn't supported. The ADC is 12-bit, supporting input voltages up to 5.7V, and separate I/O voltage supply. Maximum SPI clock rate is 20 MHz (10 MHz with daisy-chain configuration) and maximum sampling rate is 1MSPS. The IC does also support CRC but it is not implemented in the driver. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-09-13Merge tag 'v6.17-rc3' into togregJonathan Cameron
Linux 6.17-rc3
2025-09-13iio: adc: Add driver for Marvell 88PM886 PMIC ADCDuje Mihanović
Marvell's 88PM886 PMIC has a so-called General Purpose ADC used for monitoring various system voltages and temperatures. Add the relevant register definitions to the MFD header and a driver for the ADC. Acked-by: Karel Balej <balejk@matfyz.cz> # for the PMIC Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-09-13iio: adc: add ade9000 supportAntoniu Miclaus
Add driver support for the ade9000. highly accurate, fully integrated, multiphase energy and power quality monitoring device. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-09-10iio: adc: Add Intel Dollar Cove TI PMIC ADC driverHans de Goede
Intel has 2 completely different "Dollar Cove" PMICs for its Bay Trail / Cherry Trail SoCs. One is made by X-Powers and is called the AXP288. The AXP288's GPADC is already supported by the X-Powers AXP288 ADC driver. The other "Dollar Cove" PMIC is made by TI and does not have any clear TI denomination, its MFD driver calls it the "Intel Dollar Cove TI PMIC". Add a driver for the Intel Dollar Cove TI PMIC's general purpose ADC, binding to the "chtdc_ti_adc" MFD cell of the MFD driver. The "cht" in the cell name comes from Cherry Trail, but it turns out that just like the AXP288 the Intel Dollar Cove TI PMIC is also used with both Intel Bay Trail and Intel Cherry Trail SoCs, so this new ADC driver does not include the cht part in its name. This is loosely based on kernel/drivers/iio/adc/iio_dc_ti_gpadc.c from the Acer A1-840 Android kernel source-code archive named: "App. Guide_Acer_20151221_A_A.zip" which is distributed by Acer from the Acer A1-840 support page: https://www.acer.com/us-en/support/product-support/A1-840/downloads Reviewed-by: Andy Shevchenko <andy@kernel.org> Signed-off-by: Hans de Goede <hansg@kernel.org> Link: https://patch.msgid.link/20250831104825.15097-7-hansg@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-09-10iio: adc: update ad7779 to use IIO backendIoana Risteiu
Add a new functionality to ad7779 driver that streams data through data output interface using IIO backend interface. Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Ioana Risteiu <Ioana.Risteiu@analog.com> Link: https://patch.msgid.link/20250825221355.6214-5-Ioana.Risteiu@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16iio: adc: bd79124: Add GPIOLIB dependencyMatti Vaittinen
The bd79124 has ADC inputs which can be muxed to be GPIOs. The driver supports this by registering a GPIO-chip for channels which aren't used as ADC. The Kconfig entry does not handle the dependency to GPIOLIB, which causes errors: ERROR: modpost: "devm_gpiochip_add_data_with_key" [drivers/iio/adc/rohm-bd79124.ko] undefined! ERROR: modpost: "gpiochip_get_data" [drivers/iio/adc/rohm-bd79124.ko] undefined! at linking phase if GPIOLIB is not configured to be used. Fix this by adding dependency to the GPIOLIB. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202508131533.5sSkq80B-lkp@intel.com/ Fixes: 3f57a3b9ab74 ("iio: adc: Support ROHM BD79124 ADC") Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://patch.msgid.link/6837249bddf358924e67566293944506206d2d62.1755076369.git.mazziesaccount@gmail.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-16iio: adc: ad_sigma_delta: Select IIO_BUFFER_DMAENGINE and SPI_OFFLOADNathan Chancellor
CONFIG_AD_SIGMA_DELTA uses several symbols that it does not explicitly select. If no other enabled driver selects them, the build fails with either a linker failure if the driver is built in or a modpost failure if the driver is a module. ld.lld: error: undefined symbol: devm_spi_offload_rx_stream_request_dma_chan ld.lld: error: undefined symbol: devm_iio_dmaengine_buffer_setup_with_handle ld.lld: error: undefined symbol: devm_spi_offload_trigger_get ld.lld: error: undefined symbol: devm_spi_offload_get ld.lld: error: undefined symbol: spi_offload_trigger_enable ld.lld: error: undefined symbol: spi_offload_trigger_disable Select the necessary Kconfig symbols to include these functions in the build to clear up the errors. Fixes: 219da3ea842a ("iio: adc: ad_sigma_delta: add SPI offload support") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250714-iio-ad_sigma_delta-fix-kconfig-selects-v1-1-32e0d6da0423@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add GPIO controller supportMarcelo Schmitt
The AD4170-4 has four multifunctional pins that can be used as GPIOs. The GPIO functionality can be accessed when the AD4170-4 chip is not busy performing continuous data capture or handling any other register read/write request. Also, the AD4170-4 does not provide any interrupt based on GPIO pin states so AD4170-4 GPIOs can't be used as interrupt sources. Implement gpio_chip callbacks to make AD4170-4 GPIO pins controllable through the gpiochip interface. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/e031189d4b7e20cf02dd13220ab1ddf4798760c2.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add clock provider supportMarcelo Schmitt
The AD4170-4 chip can use an externally supplied clock at the XTAL2 pin, or an external crystal connected to the XTAL1 and XTAL2 pins. Alternatively, the AD4170-4 can provide its 16 MHz internal clock at the XTAL2 pin. In addition, the chip has a programmable clock divider that allows dividing the external or internal clock frequency, however, control for that is not provided in this patch. Extend the AD4170-4 driver so it effectively uses the provided external clock, if any, or supplies its own clock as a clock provider. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/68697c7613b1a69d752e541caef28d08b3e59bc1.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add support for buffered data captureMarcelo Schmitt
Extend the AD4170-4 driver to allow buffered data capture in continuous read mode. In continuous read mode, the chip skips the instruction phase and outputs just ADC sample data, enabling faster sample rates to be reached. The internal channel sequencer always starts sampling from channel 0 and channel 0 must be enabled if more than one channel is selected for data capture. The scan mask validation callback checks if the aforementioned condition is met. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/10ed544d31aa86eb40f93ea947f151d3d9827952.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: Add basic support for AD4170-4Ana-Maria Cusco
The AD4170-4 is a multichannel, low noise, 24-bit precision sigma-delta analog to digital converter. The AD4170-4 design offers a flexible data acquisition solution with crosspoint multiplexed analog inputs, configurable ADC voltage reference inputs, ultra-low noise integrated PGA, digital filtering, wide range of configurable output data rates, internal oscillator and temperature sensor, four GPIOs, and integrated features for interfacing with load cell weigh scales, RTD, and thermocouple sensors. Add basic support for the AD4170-4 ADC with the following features: - Single-shot read. - Analog front end PGA configuration. - Differential and pseudo-differential input configuration. Signed-off-by: Ana-Maria Cusco <ana-maria.cusco@analog.com> Co-developed-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/ce3fd150bd63a2aed6eb6fe59aad6d60c0f9fb67.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-26iio: adc: ad7768-1: add regulator to control VCM outputJonathan Santos
The VCM output voltage can be used as a common-mode voltage within the amplifier preconditioning circuits external to the AD7768-1. This change allows the user to configure VCM output using the regulator framework. Acked-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Link: https://patch.msgid.link/1f02312fdc4131168b194d59f4b1688dc68ea36e.1749569957.git.Jonathan.Santos@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-26iio: adc: ad7405: add ad7405 driverPop Ioan Daniel
Add support for the AD7405/ADUM770x, a high performance isolated ADC, 1-channel, 16-bit with a second-order Σ-Δ modulator that converts an analog input signal into a high speed, single-bit data stream. Signed-off-by: Pop Ioan Daniel <pop.ioan-daniel@analog.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250605150948.3091827-6-pop.ioan-daniel@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-09iio: adc: ad4080: add driver supportAntoniu Miclaus
Add support for AD4080 high-speed, low noise, low distortion, 20-bit, Easy Drive, successive approximation register (SAR) analog-to-digital converter (ADC). Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Link: https://patch.msgid.link/20250516082630.8236-10-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
generated by cgit v1.2.3 (git 2.0.4) at 2026-10-24 00:40:36 +0000