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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"This is the first half of the driver changes:
- A treewide interface change to the "syscore" operations for power
management, as a preparation for future Tegra specific changes
- Reset controller updates with added drivers for LAN969x, eic770 and
RZ/G3S SoCs
- Protection of system controller registers on Renesas and Google
SoCs, to prevent trivially triggering a system crash from e.g.
debugfs access
- soc_device identification updates on Nvidia, Exynos and Mediatek
- debugfs support in the ST STM32 firewall driver
- Minor updates for SoC drivers on AMD/Xilinx, Renesas, Allwinner, TI
- Cleanups for memory controller support on Nvidia and Renesas"
* tag 'soc-drivers-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (114 commits)
memory: tegra186-emc: Fix missing put_bpmp
Documentation: reset: Remove reset_controller_add_lookup()
reset: fix BIT macro reference
reset: rzg2l-usbphy-ctrl: Fix a NULL vs IS_ERR() bug in probe
reset: th1520: Support reset controllers in more subsystems
reset: th1520: Prepare for supporting multiple controllers
dt-bindings: reset: thead,th1520-reset: Add controllers for more subsys
dt-bindings: reset: thead,th1520-reset: Remove non-VO-subsystem resets
reset: remove legacy reset lookup code
clk: davinci: psc: drop unused reset lookup
reset: rzg2l-usbphy-ctrl: Add support for RZ/G3S SoC
reset: rzg2l-usbphy-ctrl: Add support for USB PWRRDY
dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support
reset: eswin: Add eic7700 reset driver
dt-bindings: reset: eswin: Documentation for eic7700 SoC
reset: sparx5: add LAN969x support
dt-bindings: reset: microchip: Add LAN969x support
soc: rockchip: grf: Add select correct PWM implementation on RK3368
soc/tegra: pmc: Add USB wake events for Tegra234
amba: tegra-ahb: Fix device leak on SMMU enable
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Replace open-coded getting root OF node and matching against it with
new of_machine_device_match() helper.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patch.msgid.link/20251112-b4-of-match-matchine-data-v2-11-d46b72003fd6@linaro.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
soc/tegra: Changes for v6.19-rc1
A couple of small fixes across the board: ACPI support on FUSE no longer
exposes duplicate SoC information, speedo IDs for Tegra210 are updated,
some comments see typo fixes or kerneldoc additions. Finally, support
for USB wake events is added on Tegra234, which allow these systems to
resume from suspend on USB activity.
* tag 'tegra-for-6.19-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Add USB wake events for Tegra234
soc/tegra: pmc: Document tegra_pmc.syscore field
soc/tegra: pmc: Don't fail if "aotag" is not present
soc/tegra: fuse: speedo-tegra210: Add SoC speedo 2
soc/tegra: fuse: speedo-tegra210: Update speedo IDs
soc/tegra: Resolve a spelling error in the tegra194-cbb.c
soc/tegra: fuse: Do not register SoC device on ACPI boot
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add USB wake events for Tegra234 so that system can be woken up from
suspend when USB devices hot-plug/unplug event is detected.
Signed-off-by: Haotien Hsu <haotienh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This eliminates a warning from the documentation build targets.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The "aotog" is an optional aperture, so if that aperture is not defined
for a given device, then initialise the 'aotag' pointer to NULL instead
of returning an error. Note that the PMC driver will not use 'aotag'
pointer if initialised to NULL.
Co-developed-by: Shardar Mohammed <smohammed@nvidia.com>
Signed-off-by: Shardar Mohammed <smohammed@nvidia.com>
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The Jetson Nano series of modules only have 2 EMC table entries,
different from other SoC SKUs. As the EMC driver uses the SoC speedo ID
to populate the EMC OPP tables, add a new speedo ID to uniquely identify
this.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Existing code only sets CPU and GPU speedo IDs 0 and 1. The CPU DVFS
code supports 11 IDs and nouveau supports 5. This aligns with what the
downstream vendor kernel supports. Align SKUs with the downstream list.
The Tegra210 CVB tables were added in the first referenced fixes commit.
Since then, all Tegra210 SoCs have tried to scale to 1.9 GHz, when the
supported devkits are only supposed to scale to 1.5 or 1.7 GHZ.
Overclocking should not be the default state.
Fixes: 2b2dbc2f94e5 ("clk: tegra: dfll: add CVB tables for Tegra210")
Fixes: 579db6e5d9b8 ("arm64: tegra: Enable DFLL support on Jetson Nano")
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Fix a typo spotted during code reading.
Signed-off-by: Bruno Sobreira França <brunofrancadevsec@gmail.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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On Tegra platforms using ACPI, the SMCCC driver already registers the
SoC device. This makes the registration performed by the Tegra fuse
driver redundant.
When booted via ACPI, skip registering the SoC device and suppress
printing SKU information from the Tegra fuse driver, as this information
is already provided by the SMCCC driver.
Fixes: 972167c69080 ("soc/tegra: fuse: Add ACPI support for Tegra194 and Tegra234")
Cc: stable@vger.kernel.org
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Several drivers can benefit from registering per-instance data along
with the syscore operations. To achieve this, move the modifiable fields
out of the syscore_ops structure and into a separate struct syscore that
can be registered with the framework. Add a void * driver data field for
drivers to store contextual data that will be passed to the syscore ops.
Acked-by: Rafael J. Wysocki (Intel) <rafael@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"Lots of platform specific updates for Qualcomm SoCs, including a new
TEE subsystem driver for the Qualcomm QTEE firmware interface.
Added support for the Apple A11 SoC in drivers that are shared with
the M1/M2 series, among more updates for those.
Smaller platform specific driver updates for Renesas, ASpeed,
Broadcom, Nvidia, Mediatek, Amlogic, TI, Allwinner, and Freescale
SoCs.
Driver updates in the cache controller, memory controller and reset
controller subsystems.
SCMI firmware updates to add more features and improve robustness.
This includes support for having multiple SCMI providers in a single
system.
TEE subsystem support for protected DMA-bufs, allowing hardware to
access memory areas that managed by the kernel but remain inaccessible
from the CPU in EL1/EL0"
* tag 'soc-drivers-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (139 commits)
soc/fsl/qbman: Use for_each_online_cpu() instead of for_each_cpu()
soc: fsl: qe: Drop legacy-of-mm-gpiochip.h header from GPIO driver
soc: fsl: qe: Change GPIO driver to a proper platform driver
tee: fix register_shm_helper()
pmdomain: apple: Add "apple,t8103-pmgr-pwrstate"
dt-bindings: spmi: Add Apple A11 and T2 compatible
serial: qcom-geni: Load UART qup Firmware from linux side
spi: geni-qcom: Load spi qup Firmware from linux side
i2c: qcom-geni: Load i2c qup Firmware from linux side
soc: qcom: geni-se: Add support to load QUP SE Firmware via Linux subsystem
soc: qcom: geni-se: Cleanup register defines and update copyright
dt-bindings: qcom: se-common: Add QUP Peripheral-specific properties for I2C, SPI, and SERIAL bus
Documentation: tee: Add Qualcomm TEE driver
tee: qcom: enable TEE_IOC_SHM_ALLOC ioctl
tee: qcom: add primordial object
tee: add Qualcomm TEE driver
tee: increase TEE_MAX_ARG_SIZE to 4096
tee: add TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF
tee: add TEE_IOCTL_PARAM_ATTR_TYPE_UBUF
tee: add close_context to TEE driver operation
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"We have GPIO awareness in the pin control core and an interesting
AAEON driver.
Core changes:
- Allow pins to be identified/marked as GPIO mode with a special
callback.
The pin controller core is now "aware" if a pin is in GPIO mode if
the callback is implemented in the driver, and can thus be marked
as "strict", i.e. disallowing simultaneous use of a line as GPIO
and another function such as I2C.
This is enabled in the Qualcomm TLMM driver and also implemeted
from day 1 in the new Broadcom STB driver
- Rename the pin config option PIN_CONFIG_OUTPUT to PIN_CONFIG_LEVEL
to better describe what the config is doing, as well as making it
more intuitive what shall be returned when reading this property
New drivers:
- Qualcomm SDM660 LPASS LPI TLMM pin controller subdriver
- Qualcomm Glymur family pin controller driver
- Broadcom STB family pin controller driver
- Tegra186 pin controller driver
- AAEON UP pin controller support.
This is some special pin controller that works as an external
advanced line MUX and amplifier for signals from an Intel SoC. A
cooperative effort with the GPIO maintainer was needed to reach a
solution where we reuse code from the GPIO aggregator/forwarder
driver
- Renesas RZ/T2H and RZ/N2H pin controller support
- Axis ARTPEC-8 subdriver for the Samsung pin controller driver
Improvements:
- Output enable (OEN) support in the Renesas RZG2L driver
- Properly support bias pull up/down in the pinctrl-single driver
- Move over all GPIO portions using generic MMIO GPIO to the new
generic GPIO chip management which has a nice and separate API
- Proper DT bindings for some older Broadcom SoCs
- External GPIO (EGPIO) support in the Qualcomm SM8250
Deleted code:
- Dropped the now unused Samsung S3C24xx drivers"
* tag 'pinctrl-v6.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (75 commits)
pinctrl: use more common syntax for compound literals
pinctrl: Simplify printks with pOF format
pinctrl: qcom: Add SDM660 LPASS LPI TLMM
dt-bindings: pinctrl: qcom: Add SDM660 LPI pinctrl
pinctrl: qcom: lpass-lpi: Add ability to use custom pin offsets
pinctrl: qcom: Add glymur pinctrl driver
dt-bindings: pinctrl: qcom: Add Glymur pinctrl
pinctrl: qcom: sm8250: Add egpio support
pinctrl: generic: rename PIN_CONFIG_OUTPUT to LEVEL
pinctrl: keembay: fix double free in keembay_build_functions()
pinctrl: spacemit: fix typo in PRI_TDI pin name
pinctrl: eswin: Fix regulator error check and Kconfig dependency
pinctrl: bcm: Add STB family pin controller driver
dt-bindings: pinctrl: Add support for Broadcom STB pin controller
pinctrl: qcom: make the pinmuxing strict
pinctrl: qcom: mark the `gpio` and `egpio` pins function as non-strict functions
pinctrl: qcom: add infrastructure for marking pin functions as GPIOs
pinctrl: allow to mark pin functions as requestable GPIOs
pinctrl: qcom: use generic pin function helpers
pinctrl: make struct pinfunction a pointer in struct function_desc
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
soc/tegra: Changes for v6.18-rc1
NVMEM cells are added for Tegra114. These contain calibration data for
sensors and USB.
* tag 'tegra-for-6.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: fuse: Add Tegra114 nvmem cells and fuse lookups
Link: https://lore.kernel.org/r/20250914063927.89981-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add missing Tegra114 nvmem cells and fuse lookups which were added for
Tegra124+ but omitted for Tegra114.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This is based on Nvidia's downstream 5.10 driver, rewritten to match the
mainline Tegra194 pinmux driver.
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Link: https://lore.kernel.org/20250812-tegra186-pinctrl-v3-2-115714eeecb1@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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After commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on
until late_initcall_sync") was applied, the Tegra210 Jetson TX1 board
failed to boot. Looking into this issue, before this commit was applied,
if any of the Tegra power-domains were in 'on' state when the kernel
booted, they were being turned off by the genpd core before any driver
had chance to request them. This was purely by luck and a consequence of
the power-domains being turned off earlier during boot. After this
commit was applied, any power-domains in the 'on' state are kept on for
longer during boot and therefore, may never transitioned to the off
state before they are requested/used. The hang on the Tegra210 Jetson
TX1 is caused because devices in some power-domains are accessed without
the power-domain being turned off and on, indicating that the
power-domain is not in a completely on state.
>From reviewing the Tegra PMC driver code, if a power-domain is in the
'on' state there is no guarantee that all the necessary clocks
associated with the power-domain are on and even if they are they would
not have been requested via the clock framework and so could be turned
off later. Some power-domains also have a 'clamping' register that needs
to be configured as well. In short, if a power-domain is already 'on' it
is difficult to know if it has been configured correctly. Given that the
power-domains happened to be switched off during boot previously, to
ensure that they are in a good known state on boot, fix this by
switching off any power-domains that are on initially when registering
the power-domains with the genpd framework.
Note that commit 05cfb988a4d0 ("soc/tegra: pmc: Initialise resets
associated with a power partition") updated the
tegra_powergate_of_get_resets() function to pass the 'off' to ensure
that the resets for the power-domain are in the correct state on boot.
However, now that we may power off a domain on boot, if it is on, it is
better to move this logic into the tegra_powergate_add() function so
that there is a single place where we are handling the initial state of
the power-domain.
Fixes: a38045121bf4 ("soc/tegra: pmc: Add generic PM domain support")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20250731121832.213671-1-jonathanh@nvidia.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm
Pull pmdomain updates from Ulf Hansson:
"pmdomain core:
- Leave powered-on genpds on until ->sync_state() or late_initcall_sync
- Export a common ->sync_state() helper for genpd providers
- Add generic ->sync_state() support
- Add a bus/driver for genpd provider-devices
- Introduce dev_pm_genpd_is_on() for consumers
pmdomain providers:
- cpuidle-psci: Drop redundant ->sync_state() support
- cpuidle-riscv-sbi: Drop redundant ->sync_state() support
- imx: Set ISI panic write for imx8m-blk-ctrl
- qcom: Add support for Glymur and Milos RPMh power-domains
- qcom: Use of_genpd_sync_state() for power-domains
- rockchip: Add support for the RK3528 variant
- samsung: Fix splash-screen handover by enforcing a ->sync_state()
- sunxi: Add support for Allwinner A523's PCK600 power-controller
- tegra: Opt-out from genpd's common ->sync_state() support for pmc
- thead: Instantiate a GPU power sequencer via the auxiliary bus
- renesas: Move init to postcore_initcalls
- xilinx: Move ->sync_state() support to firmware driver
- xilinx: Use of_genpd_sync_state() for power-domains
pmdomain consumers:
- remoteproc: imx_rproc: Fixup the detect/attach procedure for
pre-booted cores"
* tag 'pmdomain-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm: (44 commits)
pmdomain: qcom: rpmhpd: Add Glymur RPMh Power Domains
dt-bindings: power: rpmpd: Add Glymur power domains
remoteproc: imx_rproc: detect and attach to pre-booted remote cores
remoteproc: imx_rproc: skip clock enable when M-core is managed by the SCU
pmdomain: core: introduce dev_pm_genpd_is_on()
pmdomain: ti: Select PM_GENERIC_DOMAINS
pmdomain: sunxi: sun20i-ppu: change to tristate and enable for ARCH_SUNXI
pmdomain: sunxi: add driver for Allwinner A523's PCK-600 power controller
pmdomain: sunxi: sun20i-ppu: add A523 support
pmdomain: samsung: Fix splash-screen handover by enforcing a sync_state
cpuidle: riscv-sbi: Drop redundant sync_state support
cpuidle: psci: Drop redundant sync_state support
pmdomain: core: Leave powered-on genpds on until sync_state
pmdomain: core: Leave powered-on genpds on until late_initcall_sync
pmdomain: core: Default to use of_genpd_sync_state() for genpd providers
driver core: Add dev_set_drv_sync_state()
pmdomain: core: Add common ->sync_state() support for genpd providers
driver core: Export get_dev_from_fwnode()
firmware: xilinx: Use of_genpd_sync_state()
firmware: xilinx: Don't share zynqmp_pm_init_finalize()
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC defconfig updates from Arnd Bergmann:
"As usual, more drivers get enabled in the defconfigs, to support newly
added hardware drivers.
There is one change for Tegra that modifies the Kconfig file at the
same time, and the NXP arm32 defconfigs get a refresh"
* tag 'soc-defconfig-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits)
arm: multi_v7_defconfig: Enable TPS65219 regulator
arm: omap2plus_defconfig: Enable TPS65219 regulator
arm64: defconfig: Enable Tegra241 and Tegra264
riscv: defconfig: spacemit: enable sdhci driver for K1 SoC
riscv: defconfig: Enable PWM support for SpacemiT K1 SoC
riscv: defconfig: Remove CONFIG_SND_SOC_STARFIVE=m
arm64: defconfig: Enable Tegra HSP and BPMP
ARM: imx_v6_v7_defconfig: select CONFIG_USB_HSIC_USB3503
ARM: imx_v6_v7_defconfig: select CONFIG_INPUT_PWM_BEEPER
ARM: imx_v6_v7_defconfig: cleanup with savedefconfig
ARM: mxs_defconfig: select new drivers used by imx28-amarula-rmm
ARM: mxs_defconfig: Cleanup mxs_defconfig
arm64: defconfig: enable further Rockchip platform drivers
arm64: defconfig: enable Samsung PMIC over ACPM
arm64: defconfig: enable Maxim max77759 driver
ARM: configs: sama5_defconfig: Select CONFIG_WILC1000_SDIO
ARM: shmobile: defconfig: Refresh for v6.16-rc2
arm64: defconfig: Enable RZ/V2H(P) USB2 PHY controller reset driver
arm64: defconfig: add S32G RTC module support
arm64: defconfig: Drop unneeded unselectable sound drivers
...
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https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
soc/tegra: Updates for v6.17-rc1
The bulk of this is the addition of Tegra264 support for various low-
level components. This also adds fabric descriptors for the new Tegra254
and Tegra264 chips.
* tag 'tegra-for-6.17-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: cbb: Add support for CBB fabrics in Tegra254
soc/tegra: cbb: Add support for CBB fabrics in Tegra264
soc/tegra: cbb: Support HW lookup to get timed out target address
soc/tegra: cbb: Improve handling for per SoC fabric data
soc/tegra: cbb: Make error interrupt enable and status per SoC
soc/tegra: cbb: Change master/slave to initiator/target
soc/tegra: cbb: Clear ERR_FORCE register with ERR_STATUS
soc/tegra: Add Tegra264 APBMISC compatible string
soc/tegra: pmc: Add Tegra264 support
soc/tegra: Enable support for Tegra264
Link: https://lore.kernel.org/r/20250711220943.2389322-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add support for CBB 2.0 based fabrics in Tegra254 SoC using ACPI.
Fabrics reporting errors are: C2C, GPU and Display_Cluster. Tegra254
uses a hardware based lookup to get target node address, so the
target_map tables for each fabric are no longer needed.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add support for CBB 2.0 based fabrics in Tegra264 SoC using DT. Fabrics
reporting errors are: SYSTEM, TOP0, UPHY0 and VISION.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add support for hardware based lookup to get the address of the timed
out target node. This features is added in upcoming SoCs and avoids the
need for creating per fabric target_map tables in the driver.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Improve handling for the per SoC fabrics and targets.
The below changes make them more flexible and ready for future SoC's.
- Added SoC prefix to Fabric_ID enums.
- Rename *lookup_target_timeout() to *sw_lookup_target_timeout() to
make it separate from HW based lookup function to be added later.
- Moved target_map within fabric_lookup table to make it easy to
check whether SW vs HW lookup is supported and handle accordingly.
- Slight improvements to some error prints.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Make the error interrupt enable and error status fields as per SoC. Both
of these fields can change for different SoC's. Moving them to per SoC
data helps to set or clear the required bits only for a SoC.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Change usage of 'Master/Slave' to 'Initiator/Target' as per the new
convention.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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When error is injected with the ERR_FORCE register, then this register
is not auto cleared on clearing the ERR_STATUS register. This causes
repeated interrupts on error injection. To fix, set the ERR_FORCE to
zero along with clearing the ERR_STATUS register after handling error.
Fixes: fc2f151d2314 ("soc/tegra: cbb: Add driver for Tegra234 CBB 2.0")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Tegra implements its own specific ->sync_state() callback for the genpd
providers. Let's set the GENPD_FLAG_NO_SYNC_STATE to inform genpd about it.
Moreover, let's call of_genpd_sync_state() to make sure genpd tries to
power off unused PM domains.
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Colibri iMX8X
Tested-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> # TI AM62A,Xilinx ZynqMP ZCU106
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20250701114733.636510-10-ulf.hansson@linaro.org
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irq_domain_create_simple() takes fwnode as the first argument. It can be
extracted from the struct device using dev_fwnode() helper instead of
using of_node with of_fwnode_handle().
So use the dev_fwnode() helper.
Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org>
Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/linuxppc-dev/20250611104348.192092-19-jirislaby@kernel.org/
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
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Selecting the IVC, HSP and BPMP drivers via Kconfig is problematic
because it can create conflicting configurations. Instead, enable them
in the default configuration.
Link: https://lore.kernel.org/r/20250506133118.1011777-12-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Link: https://lore.kernel.org/r/20250506133118.1011777-9-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The PMC block on Tegra264 has undergone a few small changes since it's
Tegra234 predecessor. Match on the new compatible string to select the
updated SoC-specific data.
Link: https://lore.kernel.org/r/20250506133118.1011777-8-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Tegra264 is the successor to Tegra234, with various improvements and new
hardware.
Link: https://lore.kernel.org/r/20250506133118.1011777-7-thierry.reding@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
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irq_domain_add_*() interfaces are going away as being obsolete now.
Switch to the preferred irq_domain_create_*() ones. Those differ in the
node parameter: They take more generic struct fwnode_handle instead of
struct device_node. Therefore, of_fwnode_handle() is added around the
original parameter.
Note some of the users can likely use dev->fwnode directly instead of
indirect of_fwnode_handle(dev->of_node). But dev->fwnode is not
guaranteed to be set for all, so this has to be investigated on case to
case basis (by people who can actually test with the HW).
[ tglx: Fix up subject prefix ]
Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu> # For soc/fsl
Link: https://lore.kernel.org/all/20250319092951.37667-35-jirislaby@kernel.org
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Replace ternary (condition ? "enable" : "disable") syntax with helpers
from string_choices.h because:
1. Simple function call with one argument is easier to read. Ternary
operator has three arguments and with wrapping might lead to quite
long code.
2. Is slightly shorter thus also easier to read.
3. It brings uniformity in the text - same string.
4. Allows deduping by the linker, which results in a smaller binary
file.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250114203638.1013670-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Various Nvidia userspace applications and tests access following fuse
via Fuse nvmem interface:
* odmid
* odminfo
* boot_security_info
* public_key_hash
* reserved_odm0
* reserved_odm1
* reserved_odm2
* reserved_odm3
* reserved_odm4
* reserved_odm5
* reserved_odm6
* reserved_odm7
* odm_lock
* pk_h1
* pk_h2
* revoke_pk_h0
* revoke_pk_h1
* security_mode
* system_fw_field_ratchet0
* system_fw_field_ratchet1
* system_fw_field_ratchet2
* system_fw_field_ratchet3
* optin_enable
Update tegra234_fuse_keepouts list to allow reading these fuse from
nvmem sysfs interface.
Signed-off-by: Kartik Rajput <kkartik@nvidia.com>
Link: https://lore.kernel.org/r/20241127061053.16775-1-kkartik@nvidia.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Fix spelling error in tegra234_lookup_slave_timeout().
Signed-off-by: liujing <liujing@cmss.chinamobile.com>
Link: https://lore.kernel.org/r/20241209055148.3749-1-liujing@cmss.chinamobile.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Kernel coding style expects all drivers to ignore debugfs errors.
Partially because it is purely for debugging, not for important user
interfaces. Simplify the code by dropping unnecessary probe failuring
and error message on debugfs failures, which also fixes incorrect usage
IS_ERR_OR_NULL() and Smatch warning:
drivers/soc/tegra/cbb/tegra-cbb.c:80 tegra_cbb_err_debugfs_init() warn: passing zero to 'PTR_ERR'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250104141958.115911-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Thierry Reding <treding@nvidia.com>
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After commit 0edb555a65d1 ("platform: Make platform_driver::remove()
return void") .remove() is (again) the right callback to implement for
platform drivers.
Convert all platform drivers below drivers/soc to use .remove(), with
the eventual goal to drop struct platform_driver::remove_new(). As
.remove() and .remove_new() have the same prototypes, conversion is done
by just changing the structure member name in the driver initializer.
On the way do a few whitespace changes to make indention consistent.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Herve Codina <herve.codina@bootlin.com> # for fsl/qe/{qmc,tsa}.c
Acked-by: Bjorn Andersson <andersson@kernel.org> # qcom parts
Acked-by: Gabriel Somlo <gsomlo@gmail.com>
Acked-by: Andrew Jeffery <andrew@codeconstruct.com.au> # aspeed
Link: https://lore.kernel.org/r/20241029074859.509587-2-u.kleine-koenig@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Use scoped for_each_child_of_node_scoped() when iterating over device
nodes to make code a bit simpler.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
soc/tegra: Changes for v6.11-rc1
This is a simple change that condenses two function calls into one in
two places to save some boilerplate.
* tag 'tegra-for-6.11-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Simplify resource lookup
Link: https://lore.kernel.org/r/20240628210818.3627404-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Commit 6f4429e21a7f ("soc/tegra: pmc: Update address mapping sequence
for PMC apertures") updated the resource lookup code in the PMC driver.
Instead of calling platform_get_resource_byname() and
devm_ioremap_resource() simplify the code by simply calling
devm_platform_ioremap_resource_byname().
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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GCC 14.1 complains about the argument usage of kmemdup_array():
drivers/soc/tegra/fuse/fuse-tegra.c:130:65: error: 'kmemdup_array' sizes specified with 'sizeof' in the earlier argument and not in the later argument [-Werror=calloc-transposed-args]
130 | fuse->lookups = kmemdup_array(fuse->soc->lookups, sizeof(*fuse->lookups),
| ^
drivers/soc/tegra/fuse/fuse-tegra.c:130:65: note: earlier argument should specify number of elements, later size of each element
The annotation introduced by commit 7d78a7773355 ("string: Add
additional __realloc_size() annotations for "dup" helpers") lets the
compiler think that kmemdup_array() follows the same format as calloc(),
with the number of elements preceding the size of one element. So we
could simply swap the arguments to __realloc_size() to get rid of that
warning, but it seems cleaner to instead have kmemdup_array() follow the
same format as krealloc_array(), memdup_array_user(), calloc() etc.
Fixes: 7d78a7773355 ("string: Add additional __realloc_size() annotations for "dup" helpers")
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20240606144608.97817-2-jean-philippe@linaro.org
Signed-off-by: Kees Cook <kees@kernel.org>
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Add the wake event for the EQOS ethernet controller on Tegra194 and
Tegra234 devices, so that system can be woken up by an event from this
ethernet controller.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add SD wake event for Tegra234 so that system can be woken up from
suspend when SD card hot-plug/unplug event is detected.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Scratch address space register is used to store reboot reason. For
some Tegra234 systems, the scratch space is not available to store
the reboot reason. This is because scratch region on these systems
is not accessible by the kernel as restricted by the Hypervisor.
Such systems would delist scratch aperture from PMC DT node.
Hence this change makes scratch as optional aperture and also avoids
registering reboot notifier if scratch address space isn't mapped.
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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On Tegra SoCs prior to Tegra186, PMC has single address range only.
Starting from and after Tegra186, PMC has additional address ranges
apart from base address range. Currently in PMC driver, we try to
map these additional address ranges on all SoCs and if we fail then
we assume that the range is not valid for an SoC. This change makes
it more explicit on which address ranges are expected to be present
on which SoCs and maps the additional address ranges only on SoCs
from and after Tegra186.
Signed-off-by: Petlozu Pravareshwar <petlozup@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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If all the other SoCs are disabled, the driver fails to build:
drivers/soc/tegra/fuse/fuse-tegra30.c:684:17: error: 'tegra30_fuse_read' undeclared here (not in a function); did you mean 'tegra_fuse_readl'?
684 | .read = tegra30_fuse_read,
| ^~~~~~~~~~~~~~~~~
| tegra_fuse_readl
drivers/soc/tegra/fuse/fuse-tegra30.c:694:17: error: 'tegra30_fuse_init' undeclared here (not in a function); did you mean 'tegra_fuse_info'?
694 | .init = tegra30_fuse_init,
| ^~~~~~~~~~~~~~~~~
Fix the list of SoCs using this function to include the newly added one.
Fixes: dee509eb9cd5 ("soc/tegra: fuse: Add support for Tegra241")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Commit c5b2d43e67bb ("soc/tegra: fuse: Add ACPI support for Tegra194 and
Tegra234") updated the Tegra fuse driver to add ACPI support and added a
test to the tegra_fuse_readl() function to check if the device is
booting with device-tree. This test passes 'fuse->dev' variable to
dev_fwnode() but does not check first is 'fuse->dev' is valid. This is
causing a crash to occur in Tegra XUSB PHY driver that calls the
tegra_fuse_readl() function before 'fuse->dev' variable has been
initialised ...
Unable to handle kernel NULL pointer dereference at virtual address 0000000000000290
Mem abort info:
ESR = 0x0000000096000004
EC = 0x25: DABT (current EL), IL = 32 bits
SET = 0, FnV = 0
EA = 0, S1PTW = 0
FSC = 0x04: level 0 translation fault
Data abort info:
ISV = 0, ISS = 0x00000004, ISS2 = 0x00000000
CM = 0, WnR = 0, TnD = 0, TagAccess = 0
GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0
[0000000000000290] user address but active_mm is swapper
Internal error: Oops: 0000000096000004 [#1] PREEMPT SMP
Modules linked in:
CPU: 7 PID: 70 Comm: kworker/u16:4 Not tainted 6.8.0-rc1-next-20240129-02825-g596764183be8 #1
Hardware name: NVIDIA Jetson AGX Xavier Developer Kit (DT)
Workqueue: events_unbound deferred_probe_work_func
pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
pc : __dev_fwnode+0x0/0x18
lr : tegra_fuse_readl+0x24/0x98
sp : ffff80008393ba10
x29: ffff80008393ba10 x28: 0000000000000000 x27: ffff800081233c10
x26: 00000000000001c8 x25: ffff000080b7bc10 x24: ffff000082df3b00
x23: fffffffffffffff4 x22: 0000000000000004 x21: ffff80008393ba84
x20: 00000000000000f0 x19: ffff800082f1e000 x18: ffff800081d72000
x17: 0000000000000001 x16: 0000000000000001 x15: ffff800082fcdfff
x14: 0000000000000000 x13: 0000000003541000 x12: 0000000000000020
x11: 0140000000000000 x10: ffff800080000000 x9 : 0000000000000000
x8 : ffff000082df3b40 x7 : 0000000000000000 x6 : 000000000000003f
x5 : 00000000ffffffff x4 : 0000000000000dc0 x3 : 00000000000000c0
x2 : 0000000000000001 x1 : ffff80008393ba84 x0 : 0000000000000000
Call trace:
__dev_fwnode+0x0/0x18
tegra186_xusb_padctl_probe+0xb0/0x1a8
tegra_xusb_padctl_probe+0x7c/0xebc
platform_probe+0x90/0xd8
really_probe+0x13c/0x29c
__driver_probe_device+0x7c/0x124
driver_probe_device+0x38/0x11c
__device_attach_driver+0x90/0xdc
bus_for_each_drv+0x78/0xdc
__device_attach+0xfc/0x188
device_initial_probe+0x10/0x18
bus_probe_device+0xa4/0xa8
deferred_probe_work_func+0x80/0xb4
process_scheduled_works+0x178/0x3e0
worker_thread+0x164/0x2e8
kthread+0xfc/0x11c
ret_from_fork+0x10/0x20
Code: a8c27bfd d65f03c0 128002a0 d65f03c0 (f9414801)
---[ end trace 0000000000000000 ]---
Fix this by verifying that 'fuse->dev' is valid before passing to
dev_fwnode().
Fixes: c5b2d43e67bb ("soc/tegra: fuse: Add ACPI support for Tegra194 and Tegra234")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Kartik <kkartik@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Tegra241 SoC data uses tegra194_soc_attr_group, which is only defined
if config CONFIG_ARCH_TEGRA_194_SOC or CONFIG_ARCH_TEGRA_234_SOC or
both are enabled. This causes a build failure if both of these configs
are disabled and CONFIG_ARCH_TEGRA_241_SOC is enabled.
Define tegra194_soc_attr_group if CONFIG_ARCH_TEGRA_241_SOC is enabled.
Signed-off-by: Kartik <kkartik@nvidia.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Tested-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Signed-off-by: Thierry Reding <treding@nvidia.com>
|
