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2025-10-02thermal: renesas: Fix RZ/G3E fall-outGeert Uytterhoeven
- Restore sort order in MAINTAINERS and Kconfig, - Remove empty trailing line from Makefile. Fixes: 19d3a401a617c68e ("thermal/drivers/renesas/rzg3e: Add thermal driver for the Renesas RZ/G3E SoC") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-09-28Merge tag 'thermal-v6.18-rc1-2' of ↵Rafael J. Wysocki
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux Merge a thermal driver fix for 6.18 from Daniel Lezcano: "- Add missing file when importing conflicting change for the Renesas RZ/G3E thermal driver (Daniel Lezcano)" * tag 'thermal-v6.18-rc1-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux: thermal/drivers/renesas/rzg3e: Fix add thermal driver for the Renesas RZ/G3E SoC
2025-09-28thermal/drivers/renesas/rzg3e: Fix add thermal driver for the Renesas RZ/G3E SoCJohn Madieu
When applied the change commit 19d3a401a617, a conflict appeared resulting into a manual fix. However the new file rzg3e_thermal.c was not added but stayed locally in source tree and miss to be merged with the entire change. Fix this by adding the file back. Fixes: 19d3a401a617 ("Add thermal driver for the Renesas RZ/G3E SoC") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202509272225.sARVqv2G-lkp@intel.com Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-26Merge tag 'thermal-v6.18-rc1' of ↵Rafael J. Wysocki
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux Merge updates of thermal drivers for 6.18-rc1 from Daniel Lezcano: "- Add the QCS615 compatible DT bindings for QCom platforms (Gaurav Kohli) - Support fallback trimming values when the fuse is empty in the R-Car driver (Marek Vasut) - Remove unneeded semicolon in the Mediatek LVTS driver (Jiapeng Chong) - Fix the LMH Kconfig option by selecting QCOM_SCM and take the opportunity to add the COMPILE_TEST option for the QCom's LMH feature (Dmitry Baryshkov) - Fix the missing includes and incorrect error message in the Qcom's LMH driver (Dmitry Baryshkov) - Fix comment typo and add the documentation in the Kconfig for the R-Car Gen3 and Gen4 (Marek Vasut) - Add Tegra114 SOCTHERM support (Svyatoslav Ryhel) - Rename the functions name in the driver to be consistent and generic with the different R-Car platform variants (Wolfram Sang) - Register the TI K3 J72xx bandgap sensor as a hwmon sensor too (Michael Walle) - Add and document the thermal sensor unit reporting the junction temperature of the RZ/G3S SoC (Claudiu Beznea) - Support the GRF in the Rockchip driver (Sebastian Reichel) - Add a temperature IIO sensor channel in the generic thermal ADC driver (Svyatoslav Ryhel) - Document the temperature sensor on the QCOM's Glymur platform (Manaf Meethalavalappu) - Add and document the thermal sensor unit reporting the junction temperature of the RZ/G3E SoC (John Madieu)" * tag 'thermal-v6.18-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux: (24 commits) dt-bindings: thermal: qcom-tsens: Document the Glymur temperature Sensor thermal/drivers/renesas/rzg3e: Add thermal driver for the Renesas RZ/G3E SoC dt-bindings: thermal: r9a09g047-tsu: Document the TSU unit thermal/drivers/thermal-generic-adc: Add temperature sensor channel dt-bindings: thermal: rockchip: Tighten grf requirements thermal/drivers/rockchip: Shut up GRF warning thermal/drivers/rockchip: Unify struct rockchip_tsadc_chip format thermal/drivers/renesas/rzg3s: Add thermal driver for the Renesas RZ/G3S SoC dt-bindings: thermal: r9a08g045-tsu: Document the TSU unit thermal/drivers/k3_j72xx_bandgap: Register sensors with hwmon thermal/drivers/rcar_gen3: Fix mapping SoCs to generic Gen4 entry thermal/drivers/tegra: Add Tegra114 specific SOCTHERM driver dt-bindings: thermal: add Tegra114 soctherm header thermal/drivers/tegra/soctherm-fuse: Prepare calibration for Tegra114 support dt-bindings: thermal: Document Tegra114 SOCTHERM Thermal Management System thermal/drivers/rcar_gen3: Document Gen4 support in Kconfig entry thermal/drivers/rcar_gen3: Fix comment typo drivers/thermal/qcom/lmh: Fix incorrect error message thermal/drivers/qcom/lmh: Add missing IRQ includes thermal/drivers/qcom: Make LMH select QCOM_SCM ...
2025-09-26Merge branch 'thermal-intel'Rafael J. Wysocki
Merge an adjustment of the new Power Slider interface in the int340x thermal driver. * thermal-intel: thermal: intel: int340x: Power Slider: Validate slider_balance range
2025-09-25thermal/drivers/renesas/rzg3e: Add thermal driver for the Renesas RZ/G3E SoCJohn Madieu
The RZ/G3E SoC integrates a Temperature Sensor Unit (TSU) block designed to monitor the chip's junction temperature. This sensor is connected to channel 1 of the APB port clock/reset and provides temperature measurements. It also requires calibration values stored in the system controller registers for accurate temperature measurement. Add a driver for the Renesas RZ/G3E TSU. [ dlezcano: Fixed conflict with "renesas: Add support for RZ/G3S" ] Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20250917170202.197929-3-john.madieu.xa@bp.renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25thermal/drivers/thermal-generic-adc: Add temperature sensor channelSvyatoslav Ryhel
To avoid duplicating sensor functionality and conversion tables, this design allows converting an ADC IIO channel's output directly into a temperature IIO channel. This is particularly useful for devices where hwmon isn't suitable or where temperature data must be accessible through IIO. One such device is, for example, the MAX17040 fuel gauge. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20250903162749.109910-2-clamor95@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25thermal/drivers/rockchip: Shut up GRF warningSebastian Reichel
Most of the recent Rockchip devices do not have a GRF associated with the tsadc IP. Let's avoid printing a warning on those devices. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Tested-by: Diederik de Haas <didi.debian@cknow.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250820-thermal-rockchip-grf-warning-v2-2-c7e2d35017b8@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25thermal/drivers/rockchip: Unify struct rockchip_tsadc_chip formatSebastian Reichel
Unify all chip descriptions to the version without any empty lines. Suggested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Dragan Simic <dsimic@manjaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250820-thermal-rockchip-grf-warning-v2-1-c7e2d35017b8@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25thermal/drivers/renesas/rzg3s: Add thermal driver for the Renesas RZ/G3S SoCClaudiu Beznea
The Renesas RZ/G3S SoC features a Thermal Sensor Unit (TSU) that reports the junction temperature. The temperature is reported through a dedicated ADC channel. Add a driver for the Renesas RZ/G3S TSU. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20250810122125.792966-3-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25thermal/drivers/k3_j72xx_bandgap: Register sensors with hwmonMichael Walle
Make the sensors available in the hwmon subsystem (if CONFIG_THERMAL_HWMON is enabled). Signed-off-by: Michael Walle <mwalle@kernel.org> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://lore.kernel.org/r/20250828124042.1680853-1-mwalle@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25thermal/drivers/rcar_gen3: Fix mapping SoCs to generic Gen4 entryWolfram Sang
S4 was added first so it was assumed to be the blueprint for R-Car Gen4. It turned out now, that S4 is a special mix between Gen3 and Gen4. V4H and V4M are the similar ones as confirmed by HW engineers. So, rename the S4 entry to be specific instead of generic. Rename the V4H entry to be the new generic one, so V4M will use it as well now. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250911070254.2214-2-wsa+renesas@sang-engineering.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25thermal/drivers/tegra: Add Tegra114 specific SOCTHERM driverSvyatoslav Ryhel
Add Tegra114 specific SOCTHERM driver. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Link: https://lore.kernel.org/r/20250828055104.8073-6-clamor95@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25thermal/drivers/tegra/soctherm-fuse: Prepare calibration for Tegra114 supportSvyatoslav Ryhel
The Tegra114 has a different fuse calibration register layout and address compared to other Tegra SoCs, requiring SOCTHERM shift, mask, register address, and nominal tf calibration value to be configurable. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Link: https://lore.kernel.org/r/20250828055104.8073-4-clamor95@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25thermal/drivers/rcar_gen3: Document Gen4 support in Kconfig entryMarek Vasut
The R-Car Gen3 thermal driver supports both R-Car Gen3 and Gen4 SoCs. Update the Kconfig entry. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20250905193322.148115-1-marek.vasut+renesas@mailbox.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25thermal/drivers/rcar_gen3: Fix comment typoMarek Vasut
Fix typo to millidegree Celsius. This aligns the comment with another comment later on the same function. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Link: https://lore.kernel.org/r/20250907154148.171496-1-marek.vasut+renesas@mailbox.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-09-25drivers/thermal/qcom/lmh: Fix incorrect error messageSumeet Pawnikar
It was showing wrong error message as ARM threshold thremal trip for setting LOW threshold thermal trip. Fix this incorrect error message for setting LOW threshold thermal trip. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Sumeet Pawnikar <sumeet4linux@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20250710175426.5789-1-sumeet4linux@gmail.com
2025-09-25thermal/drivers/qcom/lmh: Add missing IRQ includesDmitry Baryshkov
As reported by LKP, the Qualcomm LMH driver needs to include several IRQ-related headers, which decrlare necessary IRQ functionality. Currently driver builds on ARM64 platforms, where the headers are pulled in implicitly by other headers, but fails to build on other platforms. Fixes: 53bca371cdf7 ("thermal/drivers/qcom: Add support for LMh driver") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202507270042.KdK0KKht-lkp@intel.com/ Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20250728-lmh-scm-v2-2-33bc58388ca5@oss.qualcomm.com
2025-09-25thermal/drivers/qcom: Make LMH select QCOM_SCMDmitry Baryshkov
The QCOM_SCM symbol is not user-visible, so it makes little sense to depend on it. Make LMH driver select QCOM_SCM as all other drivers do and, as the dependecy is now correctly handled, enable || COMPILE_TEST in order to include the driver into broader set of build tests. Fixes: 9e5a4fb84230 ("thermal/drivers/qcom/lmh: make QCOM_LMH depends on QCOM_SCM") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20250728-lmh-scm-v2-1-33bc58388ca5@oss.qualcomm.com
2025-09-25thermal/drivers/mediatek/lvts_thermal: Remove unneeded semicolonJiapeng Chong
./drivers/thermal/mediatek/lvts_thermal.c:642:2-3: Unneeded semicolon. A semicolon is present after the closing bracket of the loop, let's remove it. No functional change intended. [ dlezcano : Reworded the description and reordered the tags order ] Reported-by: Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=23244 Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20250801063540.2959610-1-jiapeng.chong@linux.alibaba.com
2025-09-25thermal/drivers/rcar_gen3: Add support for R-Car V4H default trim valuesMarek Vasut
Add default trimming values for the four temperature sensors located in Renesas R-Car V4H Working Sample SoC. The trimming values are identical for all four THS temperature sensors. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20250625181739.28391-2-marek.vasut+renesas@mailbox.org
2025-09-25thermal/drivers/rcar_gen3: Add support for per-SoC default trim valuesMarek Vasut
The Working Sample R-Car SoCs may not yet have thermal sensor trimming values programmed into fuses, those fuses are blank instead. For such SoCs, the driver includes fallback trimming values. Those values are currently applied to all SoCs which use this driver. Introduce support for per-SoC fallback trimming values in preparation for SoCs which do not use these current trimming values. No functional change is intended here. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20250625181739.28391-1-marek.vasut+renesas@mailbox.org
2025-09-24thermal: intel: int340x: Power Slider: Validate slider_balance rangeSrinivas Pandruvada
When the module parameter slider_balance is set to the performance slider value of 0, the SoC slider profile switches to the performance mode. This can cause the Linux power-profiles-daemon to change the system power mode to performance from balanced mode. This happens when there is only one platform profile registered as there will be no conflict with other platform profiles. Same issue occurs when the slider_balance is set to the power-saver slider value. Prevent module parameter slider_balance from overlapping with performance and power-saver slider values by adding range validation. Return an error when an invalid value is provided. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20250923205631.3056590-1-srinivas.pandruvada@linux.intel.com [ rjw: Changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-09-15Merge branch 'thermal-intel'Rafael J. Wysocki
Intel int340x thermal driver changes for 6.18: - Add support for new "power slider" firmware interface to the int340x thermal driver end enable it for Panther Lake platforms (Srinivas Pandruvada) - Remove a redundant ACPI control method evaluation from the int340x thermal driver (Salah Triki) and clean it up. * thermal-intel: thermal: intel: selftests: workload_hint: Mask unsupported types thermal: intel: int340x: Add module parameter to change slider offset thermal: intel: int340x: Add module parameter for balanced Slider thermal: intel: int340x: Enable power slider interface for Panther Lake thermal: intel: int340x: Add support for power slider thermal: intel: int340x: Remove redundant acpi_has_method() call
2025-09-05thermal: hwmon: replace deprecated strcpy() with strscpy()Osama Abdelkader
Since strcpy() is deprecated and the last user of it in the thermal subsystem is thermal_hwmon_lookup_by_type(), replace strcpy() in that function with strscpy(). Signed-off-by: Osama Abdelkader <osama.abdelkader@gmail.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/20250903192059.11353-1-osama.abdelkader@gmail.com [ rjw: Changelog rewrite ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-09-05thermal: testing: Rearrange variable declarations involving __free()Rafael J. Wysocki
Follow cleanup.h recommendations and always define and assign variables in one statement when __free() is used. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/5934556.DvuYhMxLoT@rafael.j.wysocki
2025-09-04thermal: gov_step_wise: Allow cooling level to be reduced earlierRafael J. Wysocki
The current behavior of the Step-wise thermal governor is to increase the cooling level one step at a time after trip point threshold passing by thermal zone temperature until the temperature stops to rise. Then, nothing is done until the temperature decreases below the (possibly updated) trip point threshold, at which point the cooling level is reduced straight to the applicable minimum. While this generally works, it is not in agreement with the throttling logic description comment in step_wise_manage() any more after some relatively recent changes, and in the case of passive cooling, it may lead to undesirable performance oscillations between high and low levels. For this reason, modify the governor's cooling device state selection function, get_target_state(), to reduce cooling by one level even if the temperature is still above the thermal zone threshold, but the temperature has started to fall down. However, ensure that the cooling level will remain above the applicable minimum in that case to pull the zone temperature further down, possibly until it falls below the trip threshold (which may now be equal to the low temperature of the trip). Doing so should help higher performance to be restored earlier in some cases which is desirable especially for passive trip points with relatively high hysteresis values. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/1947735.tdWV9SEqCh@rafael.j.wysocki [ rjw: Changelog edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-09-04thermal: gov_step_wise: Clarify cooling logic description commentRafael J. Wysocki
The cooling logic description comment next to the get_target_state() definition is slightly ambiguous in what it means by "lower cooling state", so clarify that by replacing the ambuguous phrase with "the minimum applicable cooling state". No functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/4690596.LvFx2qVVIh@rafael.j.wysocki
2025-09-04thermal: gov_step_wise: Clean up local variable initializationRafael J. Wysocki
Make the initialization of local variable throttle in thermal_zone_trip_update() more straightforward. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Link: https://patch.msgid.link/6203592.lOV4Wx5bFT@rafael.j.wysocki
2025-08-25thermal: intel: int340x: Add module parameter to change slider offsetSrinivas Pandruvada
SoC slider value is set by the user (or the default when user has not modified it). To enhance power efficiency dynamically, the firmware can optionally auto-adjust the slider value based on the current workload. This adjustment is governed by an additional parameter known as the "slider offset". This offset permits the firmware to increase the slider value up to and including "SoC slider + slider offset". Add a module parameter to specify this "slier offset" value. By default, the SoC slider offset is set to 0. This means that SoC is not allowed to switch slider position. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20250825132315.75521-5-srinivas.pandruvada@linux.intel.com [ rjw: Comment and module param description adjustments ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-08-25thermal: intel: int340x: Add module parameter for balanced SliderSrinivas Pandruvada
By default, the SoC slider value for the "balanced" platform profile is set to 3. This update introduces a new module parameter, allowing users to modify this default value. The module parameter can be specified during load time to set a custom slider value for the "balanced" profile. If the module parameter is not specified at load time and is updated later, the new value will only take effect after the next write of "balanced" to the sysfs "profile" attribute. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20250825132315.75521-4-srinivas.pandruvada@linux.intel.com [ rjw: Minor adjustments of module param description ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-08-25thermal: intel: int340x: Enable power slider interface for Panther LakeSrinivas Pandruvada
Set the PROC_THERMAL_FEATURE_SOC_POWER_SLIDER feature flag in proc_thermal_pci_ids[] for Panther Lake to enable power slider interface. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20250825132315.75521-3-srinivas.pandruvada@linux.intel.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-08-25thermal: intel: int340x: Add support for power sliderSrinivas Pandruvada
Add support for system wide energy performance preference using a SoC slider interface defined via processor thermal PCI device MMIO space. Using Linux platform-profile class API, register a new platform profile. Provide three platform power profile choices: "performance", "balanced" and "low-power". Profile sysfs is located at: /sys/class/platform-profile/platform-profile-* where attribute "name" is presented as "SoC Power Slider". At boot by default the slider is set to balanced mode. This profile is changed by user space based on user preference via power profile daemon or directly writing to the "profile" sysfs attribute. Add a CPU model specific processor thermal device feature PROC_THERMAL_FEATURE_SOC_POWER_SLIDER. When enabled for a CPU model, slider interface is registered. During system suspend callback save slider register and restore during resume callback. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://patch.msgid.link/20250825132315.75521-2-srinivas.pandruvada@linux.intel.com [ rjw: Removal of redundant outer parens from one expression ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-08-19thermal: intel: int340x: Remove redundant acpi_has_method() callSalah Triki
acpi_evaluate_object() returns an error if the needed method does not exist, so remove an unnecessary acpi_has_method() call preceding it. Signed-off-by: Salah Triki <salah.triki@gmail.com> Link: https://patch.msgid.link/aIMQ9RFciI8jmmAh@pc [ rjw: Subject adjustment ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-07-29Merge tag 'driver-core-6.17-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core Pull driver core updates from Danilo Krummrich: "debugfs: - Remove unneeded debugfs_file_{get,put}() instances - Remove last remnants of debugfs_real_fops() - Allow storing non-const void * in struct debugfs_inode_info::aux sysfs: - Switch back to attribute_group::bin_attrs (treewide) - Switch back to bin_attribute::read()/write() (treewide) - Constify internal references to 'struct bin_attribute' Support cache-ids for device-tree systems: - Add arch hook arch_compact_of_hwid() - Use arch_compact_of_hwid() to compact MPIDR values on arm64 Rust: - Device: - Introduce CoreInternal device context (for bus internal methods) - Provide generic drvdata accessors for bus devices - Provide Driver::unbind() callbacks - Use the infrastructure above for auxiliary, PCI and platform - Implement Device::as_bound() - Rename Device::as_ref() to Device::from_raw() (treewide) - Implement fwnode and device property abstractions - Implement example usage in the Rust platform sample driver - Devres: - Remove the inner reference count (Arc) and use pin-init instead - Replace Devres::new_foreign_owned() with devres::register() - Require T to be Send in Devres<T> - Initialize the data kept inside a Devres last - Provide an accessor for the Devres associated Device - Device ID: - Add support for ACPI device IDs and driver match tables - Split up generic device ID infrastructure - Use generic device ID infrastructure in net::phy - DMA: - Implement the dma::Device trait - Add DMA mask accessors to dma::Device - Implement dma::Device for PCI and platform devices - Use DMA masks from the DMA sample module - I/O: - Implement abstraction for resource regions (struct resource) - Implement resource-based ioremap() abstractions - Provide platform device accessors for I/O (remap) requests - Misc: - Support fallible PinInit types in Revocable - Implement Wrapper<T> for Opaque<T> - Merge pin-init blanket dependencies (for Devres) Misc: - Fix OF node leak in auxiliary_device_create() - Use util macros in device property iterators - Improve kobject sample code - Add device_link_test() for testing device link flags - Fix typo in Documentation/ABI/testing/sysfs-kernel-address_bits - Hint to prefer container_of_const() over container_of()" * tag 'driver-core-6.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core: (84 commits) rust: io: fix broken intra-doc links to `platform::Device` rust: io: fix broken intra-doc link to missing `flags` module rust: io: mem: enable IoRequest doc-tests rust: platform: add resource accessors rust: io: mem: add a generic iomem abstraction rust: io: add resource abstraction rust: samples: dma: set DMA mask rust: platform: implement the `dma::Device` trait rust: pci: implement the `dma::Device` trait rust: dma: add DMA addressing capabilities rust: dma: implement `dma::Device` trait rust: net::phy Change module_phy_driver macro to use module_device_table macro rust: net::phy represent DeviceId as transparent wrapper over mdio_device_id rust: device_id: split out index support into a separate trait device: rust: rename Device::as_ref() to Device::from_raw() arm64: cacheinfo: Provide helper to compress MPIDR value into u32 cacheinfo: Add arch hook to compress CPU h/w id into 32 bits for cache-id cacheinfo: Set cache 'id' based on DT data container_of: Document container_of() is not to be used in new code driver core: auxiliary bus: fix OF node leak ...
2025-07-28Merge tag 'thermal-6.17-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull thermal control updates from Rafael Wysocki: "These update the thermal control sysfs interface and multiple thermal control drivers: - Convert EAGAIN into ENODATA in temp_show() to prevent user space from polling the sysfs file in vain after a failing O_NONBLOCK read under the assumption that the read would have blocked (Hsin-Te Yuan) - Add Wildcat Lake PCI ID to the int340x Intel processor thermal driver (Srinivas Pandruvada) - Add debugfs interface to override the temperature set by the firmware in the Intel platform temperature control (PTC) interface and add a new sysfs control attribute called thermal_tolerance to it (Srinivas Pandruvada) - Enable the stage 2 shutdown in the qcom-spmi-temp-alarm thermal driver and add support for more SPMI variants to it (Anjelique Melendez) - Constify the thermal_zone_device_ops structure where possible in several assorted thermal drivers (Christophe Jaillet) - Use the dev_fwnode() helper instead of of_fwnode_handle(), as it is more adequate, wherever possible in thermal drivers (Jiri Slaby) - Implement and document One-Time Programmable fuse support in the Rockchip thermal driver in order to increase the precision of the measurements (Nicolas Frattaroli) - Change the way the Mediatek LTVS thermal driver stores the initialization data sequence to support different sequences matching different platforms. Introduce mt7988 support with a new initialization sequence (Mason Chang) - Document the QCom TSens Milos Temperature Sensor DT bindings (Luca Weiss) - Add the fallback compatible string for MT7981 and MT8516 DT bindings (Aleksander Jan Bajkowski) - Add the compatible string for the Tegra210B01 SOC_THERM driver (Aaron Kling)" * tag 'thermal-6.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (23 commits) dt-bindings: thermal: tegra: Document Tegra210B01 dt-bindings: thermal: mediatek: Add fallback compatible string for MT7981 and MT8516 dt-bindings: thermal: qcom-tsens: document the Milos Temperature Sensor thermal/drivers/mediatek/lvts_thermal: Add mt7988 lvts commands thermal/drivers/mediatek/lvts_thermal: Add lvts commands and their sizes to driver data thermal/drivers/mediatek/lvts_thermal: Change lvts commands array to static const thermal/drivers/rockchip: Support reading trim values from OTP dt-bindings: thermal: rockchip: document otp thermal trim thermal/drivers/rockchip: Support RK3576 SoC in the thermal driver dt-bindings: rockchip-thermal: Add RK3576 compatible thermal/drivers/rockchip: Rename rk_tsadcv3_tshut_mode thermal: Use dev_fwnode() thermal: Constify struct thermal_zone_device_ops thermal/drivers/loongson2: Constify struct thermal_zone_device_ops thermal/drivers/qcom-spmi-temp-alarm: Add support for LITE PMIC peripherals thermal/drivers/qcom-spmi-temp-alarm: Add support for GEN2 rev 2 PMIC peripherals thermal/drivers/qcom-spmi-temp-alarm: Prepare to support additional Temp Alarm subtypes thermal/drivers/qcom-spmi-temp-alarm: Add temp alarm data struct based on HW subtype thermal/drivers/qcom-spmi-temp-alarm: Enable stage 2 shutdown when required thermal: sysfs: Return ENODATA instead of EAGAIN for reads ...
2025-07-22Merge back earlier thermal control updates for 6.17Rafael J. Wysocki
2025-07-16thermal/drivers/mediatek/lvts_thermal: Add mt7988 lvts commandsMason Chang
These commands are necessary to avoid severely abnormal and inaccurate temperature readings that are caused by using the default commands. Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com> Link: https://lore.kernel.org/r/20250526102659.30225-4-mason-cw.chang@mediatek.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-16thermal/drivers/mediatek/lvts_thermal: Add lvts commands and their sizes to ↵Mason Chang
driver data Add LVTS commands and their sizes to driver data in preparation for adding different commands. Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com> Link: https://lore.kernel.org/r/20250526102659.30225-3-mason-cw.chang@mediatek.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-16thermal/drivers/mediatek/lvts_thermal: Change lvts commands array to static ↵Mason Chang
const Change the LVTS commands array to static const in preparation for adding different commands. Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com> Link: https://lore.kernel.org/r/20250526102659.30225-2-mason-cw.chang@mediatek.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-16thermal/drivers/rockchip: Support reading trim values from OTPNicolas Frattaroli
Many of the Rockchip SoCs support storing trim values for the sensors in factory programmable memory. These values specify a fixed offset from the sensor's returned temperature to get a more accurate picture of what temperature the silicon is actually at. The way this is implemented is with various OTP cells, which may be absent. There may both be whole-TSADC trim values, as well as per-sensor trim values. In the downstream driver, whole-chip trim values override the per-sensor trim values. This rewrite of the functionality changes the semantics to something I see as slightly more useful: allow the whole-chip trim values to serve as a fallback for lacking per-sensor trim values, instead of overriding already present sensor trim values. Additionally, the chip may specify an offset (trim_base, trim_base_frac) in degrees celsius and degrees decicelsius respectively which defines what the basis is from which the trim, if any, should be calculated from. By default, this is 30 degrees Celsius, but the chip can once again specify a different value through OTP cells. The implementation of these trim calculations have been tested extensively on an RK3576, where it was confirmed to get rid of pesky 1.8 degree Celsius offsets between certain sensors. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://lore.kernel.org/r/20250610-rk3576-tsadc-upstream-v6-5-b6e9efbf1015@collabora.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-16thermal/drivers/rockchip: Support RK3576 SoC in the thermal driverYe Zhang
The RK3576 SoC has six TS-ADC channels: TOP, BIG_CORE, LITTLE_CORE, DDR, NPU and GPU. Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com> [ported to mainline, reworded commit message] Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250610-rk3576-tsadc-upstream-v6-3-b6e9efbf1015@collabora.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-16thermal/drivers/rockchip: Rename rk_tsadcv3_tshut_modeNicolas Frattaroli
The "v" version specifier here refers to the hardware IP revision. Mainline deviated from downstream here by calling the v4 revision v3 as it didn't support the v3 hardware revision at all. This creates needless confusion, so rename it to rk_tsadcv4_tshut_mode to be consistent with what the hardware wants to be called. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250610-rk3576-tsadc-upstream-v6-1-b6e9efbf1015@collabora.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-15thermal: Use dev_fwnode()Jiri Slaby (SUSE)
irq_domain_create_simple() takes fwnode as the first argument. It can be extracted from the struct device using dev_fwnode() helper instead of using of_node with of_fwnode_handle(). So use the dev_fwnode() helper. Signed-off-by: Jiri Slaby (SUSE) <jirislaby@kernel.org> Cc: Amit Kucheria <amitk@kernel.org> Cc: Thara Gopinath <thara.gopinath@gmail.com> Cc: Rafael J. Wysocki <rafael@kernel.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Zhang Rui <rui.zhang@intel.com> Cc: Lukasz Luba <lukasz.luba@arm.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: linux-arm-msm@vger.kernel.org Cc: linux-tegra@vger.kernel.org Link: https://lore.kernel.org/r/20250611104348.192092-20-jirislaby@kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-15thermal: Constify struct thermal_zone_device_opsChristophe JAILLET
'struct thermal_zone_device_ops' are not modified in these drivers. Constifying these structures moves some data to a read-only section, so increases overall security, especially when the structure holds some function pointers. On a x86_64, with allmodconfig, as an example: Before: ====== text data bss dec hex filename 28116 5168 128 33412 8284 drivers/thermal/armada_thermal.o After: ===== text data bss dec hex filename 28244 5040 128 33412 8284 drivers/thermal/armada_thermal.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # For Armada Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/5bba3bf0139e2418b306a0f9a2f1f81ef49e88a6.1748165978.git.christophe.jaillet@wanadoo.fr Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-15thermal/drivers/loongson2: Constify struct thermal_zone_device_opsChristophe JAILLET
'struct thermal_zone_device_ops' could be left unmodified in this driver. Constifying this structure moves some data to a read-only section, so increases overall security, especially when the structure holds some function pointers. This partly reverts commit 734b5def91b5 ("thermal/drivers/loongson2: Add Loongson-2K2000 support") which removed the const qualifier. Instead, define two different structures. On a x86_64, with allmodconfig: Before: ====== text data bss dec hex filename 5089 1160 0 6249 1869 drivers/thermal/loongson2_thermal.o After: ===== text data bss dec hex filename 5464 1128 0 6592 19c0 drivers/thermal/loongson2_thermal.o Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/5f5f815f85a9450bca7848c6d47a1fee840f47e5.1748176328.git.christophe.jaillet@wanadoo.fr Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-13thermal/drivers/qcom-spmi-temp-alarm: Add support for LITE PMIC peripheralsAnjelique Melendez
Add support for TEMP_ALARM LITE PMIC peripherals. This subtype utilizes a pair of registers to configure a warning interrupt threshold temperature and an automatic hardware shutdown threshold temperature. Co-developed-by: David Collins <david.collins@oss.qualcomm.com> Signed-off-by: David Collins <david.collins@oss.qualcomm.com> Signed-off-by: Anjelique Melendez <anjelique.melendez@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250710224555.3047790-6-anjelique.melendez@oss.qualcomm.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-13thermal/drivers/qcom-spmi-temp-alarm: Add support for GEN2 rev 2 PMIC ↵Anjelique Melendez
peripherals Add support for TEMP_ALARM GEN2 PMIC peripherals with digital major revision 2. This revision utilizes individual temp DAC registers to set the threshold temperature for over-temperature stages 1 (warning), 2 (system shutdown), and 3 (emergency shutdown) instead of a single register to specify a set of thresholds. Co-developed-by: David Collins <david.collins@oss.qualcomm.com> Signed-off-by: David Collins <david.collins@oss.qualcomm.com> Signed-off-by: Anjelique Melendez <anjelique.melendez@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250710224555.3047790-5-anjelique.melendez@oss.qualcomm.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-13thermal/drivers/qcom-spmi-temp-alarm: Prepare to support additional Temp ↵Anjelique Melendez
Alarm subtypes In preparation to support newer temp alarm subtypes, add the "ops", "sync_thresholds" and "configure_trip_temps" references to spmi_temp_alarm_data. This will allow for each Temp Alarm subtype to define its own thermal_zone_device_ops and properly initialize and configure thermal trip temperature. Signed-off-by: Anjelique Melendez <anjelique.melendez@oss.qualcomm.com> Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250710224555.3047790-4-anjelique.melendez@oss.qualcomm.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-07-13thermal/drivers/qcom-spmi-temp-alarm: Add temp alarm data struct based on HW ↵Anjelique Melendez
subtype Currently multiple if/else statements are used in functions to decipher between SPMI temp alarm Gen 1, Gen 2 and Gen 2 Rev 1 functionality. Instead refactor the driver so that SPMI temp alarm chips will have reference to a spmi_temp_alarm_data struct which defines data and function callbacks based on the HW subtype. Signed-off-by: Anjelique Melendez <anjelique.melendez@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20250710224555.3047790-3-anjelique.melendez@oss.qualcomm.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>