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path: root/drivers
AgeCommit message (Expand)Author
2020-07-15drm/amdgpu: add virtual display support for navy_flounder.Jiansong Chen
2020-07-15drm/amdgpu: add sdma ip block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add gfx ip block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add ih ip block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add gmc ip block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add common ip block for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add support on mmhub for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: initialize IP offset for navy_flounderJiansong Chen
2020-07-15drm/amdgpu/soc15: add support for navy_flounderJiansong Chen
2020-07-15drm/amdgpu/gfx10: add clockgating support for navy_flounderJiansong Chen
2020-07-15drm/amdgpu/gmc10: add navy_flounder supportJiansong Chen
2020-07-15drm/amdgpu/gfx10: add support for navy_flounder firmwareJiansong Chen
2020-07-15drm/amdgpu: set asic family and ip blocks for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: set fw load type for navy_flounderJiansong Chen
2020-07-15drm/amdgpu: add navy_flounder gpu info firmwareJiansong Chen
2020-07-15drm/amdgpu: add navy_flounder asic typeJiansong Chen
2020-07-15drm/amdgpu: expand to add multiple trap event irq idHuang Rui
2020-07-15drm/amd/sriov skip vcn powergating and dec_ring_testJack Zhang
2020-07-15drm/amdgpu: correct ta header v2 ucode init start addressJohn Clements
2020-07-15drm/amd/sriov porting sriov cap to vcn3.0Jack Zhang
2020-07-15drm/amd/sriov add mmsch_v3 interfaceJack Zhang
2020-07-15drm/amdgpu: optimize rlcg write for gfx_v10Jack Zhang
2020-07-15drm/amd/sriov skip jped ip block and close pgcg flagsJack Zhang
2020-07-15drm/amd/powerplay: drop unused code around thermal range settingEvan Quan
2020-07-15drm/amd/powerplay: maximum the code sharing on thermal irq settingEvan Quan
2020-07-15drm/amd/powerplay: sort the call flow on temperature ranges retrievingEvan Quan
2020-07-15drm/amd/powerplay: cache the software_shutdown_tempEvan Quan
2020-07-15drm/amd/powerplay: correct Sienna Cichlid temperature limit settingsEvan Quan
2020-07-15drm/amd/powerplay: correct Navi1X temperature limit settingsEvan Quan
2020-07-15drm/amd/powerplay: correct the supported pcie GenSpeed and LaneCountEvan Quan
2020-07-15drm/amd/powerplay: drop unnecessary wrapper around pcie parameters settingEvan Quan
2020-07-15drm/amd/powerplay: drop unused APIs and parametersEvan Quan
2020-07-15drm/amd/powerplay: drop smu_v12_0.c unnecessary wrapper V2Evan Quan
2020-07-15drm/amd/powerplay: drop unnecessary wrappersEvan Quan
2020-07-15drm/amd/powerplay: apply gfxoff disablement/enablement for all SMU11 ASICsEvan Quan
2020-07-15drm/amd/powerplay: drop Sienna Cichlid specific set_soft_freq_limited_rangeEvan Quan
2020-07-15drm/amd/powerplay: drop unnecessary Sienna Cichlid specific APIsEvan Quan
2020-07-15drm/amd/powerplay: drop unnecessary Navi1x specific APIsEvan Quan
2020-07-15drm/amd/powerplay: drop unnecessary Arcturus specific APIsEvan Quan
2020-07-15drm/amd/powerplay: update the common API for performance level settingEvan Quan
2020-07-15drm/amd/powerplay: update UMD pstate clock settingsEvan Quan
2020-07-15drm/amd/powerplay: add new UMD pstate data structureEvan Quan
2020-07-15drm/amd/powerplay: update Sienna Cichlid default dpm table setupEvan Quan
2020-07-15drm/amd/powerplay: update Navi10 default dpm table setupEvan Quan
2020-07-15drm/amd/powerplay: update Arcturus default dpm table settingEvan Quan
2020-07-15drm/amd/powerplay: implement a common set dpm table API for smu V11Evan Quan
2020-07-15drm/amd/powerplay: add more members for dpm tableEvan Quan
2020-07-15drm/amdgpu: add module parameter choose reset modeWenhui Sheng
2020-07-15drm/amdgpu: enable mode1 resetWenhui Sheng
2020-07-15drm/amdgpu: RAS emergency restart logic refineWenhui Sheng
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