index
:
linux-toradex.git
colibri
colibri_vf
tegra
tegra-next
toradex_4.1-2.0.x-imx
toradex_4.1-2.0.x-imx-next
toradex_4.14-2.0.x-imx
toradex_4.14-2.0.x-imx-next
toradex_4.14-2.0.x-imx-rebased
toradex_4.14-2.3.x-imx
toradex_4.19.y
toradex_4.19.y-rt
toradex_4.20.y
toradex_4.9-1.0.x-imx
toradex_4.9-1.0.x-imx-next
toradex_4.9-1.0.x-imx-rebased
toradex_4.9-2.3.x-imx
toradex_4.9-2.3.x-imx-next
toradex_4.9-2.3.x-imx-rebased
toradex_5.0.y
toradex_5.15-2.0.x-imx
toradex_5.15-2.1.x-imx
toradex_5.15-2.2.x-imx
toradex_5.2.y
toradex_5.3.y
toradex_5.4-2.1.x-imx
toradex_5.4-2.3.x-imx
toradex_5.4.y
toradex_6.6-2.0.x-imx
toradex_6.6-2.1.x-imx
toradex_imx6
toradex_imx_3.10.17_1.0.0_ga
toradex_imx_3.10.17_1.0.0_ga-next
toradex_imx_3.14.28_1.0.0_ga
toradex_imx_3.14.52_1.1.0_ga
toradex_imx_3.14.52_1.1.0_ga-next
toradex_imx_4.1.15_1.0.0_ga
toradex_imx_4.1.15_1.0.0_ga-next
toradex_imx_4.14.78_1.0.0_ga-bring_up
toradex_imx_4.9.123_imx8mm_ga-bring_up
toradex_imx_4.9.51_imx8_beta1-bring_up
toradex_imx_4.9.51_imx8_beta1-bring_up_ov5640
toradex_imx_4.9.51_imx8_beta2-bring_up
toradex_ti-linux-5.10.y_bringup
toradex_ti-linux-6.1.y
toradex_ti-linux-6.6.y
toradex_tk1_l4t_r21.5
toradex_tk1_l4t_r21.6
toradex_tk1_l4t_r21.7
toradex_tk1_l4t_r21.7-next
toradex_vf_3.18
toradex_vf_3.18-next
toradex_vf_4.0
toradex_vf_4.0-next
toradex_vf_4.1
toradex_vf_4.1-next
toradex_vf_4.4
toradex_vf_4.4-next
Linux kernel for Apalis and Colibri modules
Toradex
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
include
/
asm-mips
/
cpu.h
Age
Commit message (
Expand
)
Author
2008-07-15
[MIPS] modify the MIPS CPU classfication
Chen, Huacai
2008-04-28
[MIPS] Move arch/mips/philips to arch/mips/nxp
Daniel Laird
2008-04-28
[MIPS] Add support for MIPS CMP platform.
Ralf Baechle
2008-01-29
[MIPS] Alchemy: Au1210/Au1250 CPU support
Manuel Lauss
2007-10-11
[MIPS] Convert list of CPU types from #define to enum.
Ralf Baechle
2007-10-11
[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.
Ralf Baechle
2007-10-11
[MIPS] Add support for BCM47XX CPUs.
Aurelien Jarno
2007-07-10
[MIPS] PMC MSP71xx mips common
Marc St-Jean
2007-07-10
[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
Fuxin Zhang
2007-07-10
[MIPS] Enable support for the userlocal hardware register
Ralf Baechle
2007-07-06
[MIPS] Add macros to encode processor revisions.
Ralf Baechle
2006-07-13
[MIPS] Use the proper technical term for naming some of the cache macros.
Ralf Baechle
2006-06-01
[MIPS] Treat R14000 like R10000.
Kumba
2006-06-01
[MIPS] Fix detection and handling of the 74K processor.
Chris Dearman
2006-02-14
[MIPS] Fix CPU type bitmasks for MIPS III, IV and V.
Maciej W. Rozycki
2006-01-10
MIPS: Reorganize ISA constants strictly as bitmasks.
Ralf Baechle
2006-01-10
MIPS: Introduce machinery for testing for MIPSxxR1/2.
Ralf Baechle
2006-01-10
MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.
Ralf Baechle
2005-10-29
Add support for SB1A CPU.
Andrew Isaacson
2005-10-29
Cleanup the mess in cpu_cache_init.
Ralf Baechle
2005-10-29
Move MIPS Technologies processor IDs to where they belong.
Maciej W. Rozycki
2005-10-29
Philips PNX8550 support: MIPS32-like core with 2 Trimedias on it.
Pete Popov
2005-10-29
Detect the MIPS R2 vectored interrupt, external interrupt controller
Ralf Baechle
2005-10-29
Detect the 34K.
Ralf Baechle
2005-10-29
Support the MIPS32 / MIPS64 DSP ASE.
Ralf Baechle
2005-10-29
Cleanup decoding of MIPSxx config registers.
Ralf Baechle
2005-10-29
Base Au1200 2.6 support.
Pete Popov
2005-10-29
Add a few more PrId vendor IDs.
Ralf Baechle
2005-04-16
Linux-2.6.12-rc2
v2.6.12-rc2
Linus Torvalds
