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authorPali Rohár <pali@kernel.org>2022-01-12 18:20:47 +0100
committerStefan Roese <sr@denx.de>2022-01-14 11:39:16 +0100
commit18d85d6e8ad766de9dd35c4d5c0d984233fb9b21 (patch)
tree404baf238d93e7f9827e97ab29794e153584cfdc
parentbdf8c9f219af279cbf9e037318ba44ef3bef1d6d (diff)
arm: mvebu: Enable BootROM output on A38x
BootROMs on pre-A38x SoCs enabled its output on UART by default, but A38x' BootROM has its output on UART disabled by default. To enable BootROM output on A38x SoC, it is required to set DEBUG flag (which only enables BootROM output and nothing more) in kwbimage. For UART images this DEBUG flag is ignored by BootROM. Enable kwbimage DEBUG flag for all A38x boards. With this change BootROM prints the following (success) information on UART before booting U-Boot kwbimage: BootROM - 1.73 Booting from SPI flash Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
-rw-r--r--arch/arm/mach-mvebu/Makefile7
-rw-r--r--arch/arm/mach-mvebu/kwbimage.cfg.in3
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 799935ce0b4..a5a20877dda 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -70,6 +70,13 @@ KWB_REPLACE += SEC_FUSE_DUMP
KWB_CFG_SEC_FUSE_DUMP = a38x
endif
+ifdef CONFIG_ARMADA_38X
+# BootROM output is by default enabled on pre-A38x and disabled on A38x
+# DEBUG flag on A38x for non-UART boot source only enable BootROM output and nothing more
+KWB_REPLACE += DEBUG
+KWB_CFG_DEBUG = 1
+endif
+
quiet_cmd_kwbcfg = KWBCFG $@
cmd_kwbcfg = sed -ne '$(foreach V,$(KWB_REPLACE),s/\#@$(V)/$(V) $(KWB_CFG_$(V))/;)p' \
<$< >$(dir $@)$(@F)
diff --git a/arch/arm/mach-mvebu/kwbimage.cfg.in b/arch/arm/mach-mvebu/kwbimage.cfg.in
index 603e8863450..ccb09975817 100644
--- a/arch/arm/mach-mvebu/kwbimage.cfg.in
+++ b/arch/arm/mach-mvebu/kwbimage.cfg.in
@@ -11,5 +11,8 @@ VERSION 1
# Boot Media configurations
#@BOOT_FROM
+# Enable BootROM output via DEBUG flag on SoCs which require it
+#@DEBUG
+
# Include U-Boot SPL with DDR3 training code into Binary Header
BINARY spl/u-boot-spl.bin #@LOAD_ADDRESS