diff options
author | Yao Zi <ziyao@disroot.org> | 2025-05-13 09:05:01 +0000 |
---|---|---|
committer | Leo Yu-Chi Liang <ycliang@andestech.com> | 2025-05-21 16:49:52 +0800 |
commit | 19ec61b3e6c9c9b027d50eda9f03929bdd00b4a9 (patch) | |
tree | a4c5c25e1200c82ca4a01795eb04d84a776d851b | |
parent | 64735e56aa0ae5cf37fed25dbcc16934bfb2bfce (diff) |
riscv: dts: th1520: Add binman configuration
Add binman configuration for TH1520 SoC, whose BROM loads the image
combined into SRAM and directly jumps to it. The configuration creates
u-boot-with-spl.bin where the SPL code locates at the start and the DDR
firmware is shipped.
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
-rw-r--r-- | arch/riscv/dts/thead-th1520-binman.dtsi | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/riscv/dts/thead-th1520-binman.dtsi b/arch/riscv/dts/thead-th1520-binman.dtsi new file mode 100644 index 00000000000..f060639e1c6 --- /dev/null +++ b/arch/riscv/dts/thead-th1520-binman.dtsi @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025 Yao Zi <ziyao@disroot.org> + */ + +#include <config.h> + +/ { + binman: binman { + }; +}; + +&binman { + filename = "u-boot-with-spl.bin"; + + u-boot-spl { + }; + + ddr-fw { + filename = "th1520-ddr-firmware.bin"; + type = "blob-ext"; + }; + + fit { + offset = <CONFIG_SPL_PAD_TO>; + + description = "Configuration to load M-mode U-Boot"; + + #address-cells = <2>; + fit,fdt-list = "of-list"; + + images { + uboot { + description = "U-Boot"; + type = "standalone"; + os = "U-boot"; + arch = "riscv"; + compression = "none"; + load = /bits/ 64 <CONFIG_TEXT_BASE>; + + uboot_blob: u-boot { + }; + }; + }; + + configurations { + default = "conf-th1520-lichee-pi-4a"; + + conf-th1520-lichee-pi-4a { + description = "th1520-lichee-pi-4a"; + loadables = "uboot"; + }; + }; + }; +}; |