diff options
| author | Manikanta Guntupalli <manikanta.guntupalli@amd.com> | 2024-07-15 16:23:43 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2024-08-05 16:10:36 +0200 |
| commit | 1fc7dcc0be752da3c50685f79d10d73aba74a8f6 (patch) | |
| tree | de014b99d7c00bfbb967a40f58b234c0d7f9c1ae | |
| parent | a484d4e3ee299474e5053e32e8518945ff63f8b4 (diff) | |
arm64: zynqmp: Add resets property for UART nodes
Add resets property for UART0 and UART1 nodes
Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/81c602417a5d28dfbce122b2e5a63ff7ddb74594.1721053421.git.michal.simek@amd.com
| -rw-r--r-- | arch/arm/dts/zynqmp.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 34f592c1a85..6a29f610153 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -1025,6 +1025,7 @@ reg = <0x0 0xff000000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; power-domains = <&zynqmp_firmware PD_UART_0>; + resets = <&zynqmp_reset ZYNQMP_RESET_UART0>; }; uart1: serial@ff010000 { @@ -1036,6 +1037,7 @@ reg = <0x0 0xff010000 0x0 0x1000>; clock-names = "uart_clk", "pclk"; power-domains = <&zynqmp_firmware PD_UART_1>; + resets = <&zynqmp_reset ZYNQMP_RESET_UART1>; }; usb0: usb@ff9d0000 { |