ARM: renesas: Add support for the r7s72100 Genmai board

Add r7s72100 Genmai board support. Serial console, NOR Flash and
Ethernet are known to work however on-board SDRAM is not yet enabled.

Signed-off-by: Magnus Damm <damm@opensource.se>

9 files changed, 142 insertions, 0 deletions

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 10404ce076e..17795f8f746 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -924,6 +924,7 @@ dtb-$(CONFIG_ARCH_IMXRT) += imxrt1020-evk.dtb \
 	imxrt1170-evk.dtb \
 
 dtb-$(CONFIG_RZA1) += \
+	r7s72100-genmai.dtb \
 	r7s72100-gr-peach.dtb
 
 dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb
diff --git a/arch/arm/dts/r7s72100-genmai-u-boot.dtsi b/arch/arm/dts/r7s72100-genmai-u-boot.dtsi
new file mode 100644
index 00000000000..782ebfea2fb
--- /dev/null
+++ b/arch/arm/dts/r7s72100-genmai-u-boot.dtsi
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the Genmai board
+ * Based on GR Peach, Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
+ */
+
+/ {
+	soc {
+		bootph-all;
+	};
+};
+
+&bsc {
+	bootph-all;
+};
+
+&ostm0 {
+	bootph-all;
+};
+
+&pinctrl {
+	bootph-all;
+};
+
+&scif2 {
+	bootph-all;
+	clock = <66666666>;	/* ToDo: Replace by DM clock driver */
+};
+
+&scif2_pins {
+	bootph-all;
+};
diff --git a/arch/arm/mach-renesas/Kconfig.rza1 b/arch/arm/mach-renesas/Kconfig.rza1
index e88f9a2eedb..c9e2b835204 100644
--- a/arch/arm/mach-renesas/Kconfig.rza1
+++ b/arch/arm/mach-renesas/Kconfig.rza1
@@ -14,12 +14,16 @@ choice
 	prompt "Renesas RZ/A1 board select"
 
 # Renesas Supported Boards
+config TARGET_GENMAI
+	bool "GENMAI board"
+
 config TARGET_GRPEACH
 	bool "GR-PEACH board"
 
 endchoice
 
 # Renesas Supported Boards
+source "board/renesas/genmai/Kconfig"
 source "board/renesas/grpeach/Kconfig"
 
 endif
diff --git a/board/renesas/genmai/Kconfig b/board/renesas/genmai/Kconfig
new file mode 100644
index 00000000000..4e67a9b325a
--- /dev/null
+++ b/board/renesas/genmai/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_GENMAI
+
+config SYS_BOARD
+	default "genmai"
+
+config SYS_VENDOR
+	default "renesas"
+
+config SYS_CONFIG_NAME
+	default "genmai"
+
+endif
diff --git a/board/renesas/genmai/MAINTAINERS b/board/renesas/genmai/MAINTAINERS
new file mode 100644
index 00000000000..1f1c2944632
--- /dev/null
+++ b/board/renesas/genmai/MAINTAINERS
@@ -0,0 +1,5 @@
+GENMAI BOARD
+M:	Magnus Damm <damm@opensource.se>
+S:	Maintained
+F:	arch/arm/dts/r7s72100*
+N:	genmai
diff --git a/board/renesas/genmai/Makefile b/board/renesas/genmai/Makefile
new file mode 100644
index 00000000000..73f5e45affd
--- /dev/null
+++ b/board/renesas/genmai/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2025 Magnus Damm <damm@opensource.se>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y	:= genmai.o
diff --git a/board/renesas/genmai/genmai.c b/board/renesas/genmai/genmai.c
new file mode 100644
index 00000000000..8153aed15e3
--- /dev/null
+++ b/board/renesas/genmai/genmai.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2025 Magnus Damm <damm@opensource.se>
+ */
+
+#include <init.h>
+#include <asm/global_data.h>
+#include <asm/io.h>
+
+#define RZA1_BCR_BASE	0x3FFFC000
+#define CS0BCR		(RZA1_BCR_BASE + 0x04)
+#define CS0WCR		(RZA1_BCR_BASE + 0x28)
+#define CS1BCR		(RZA1_BCR_BASE + 0x08)
+#define CS1WCR		(RZA1_BCR_BASE + 0x2c)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+	gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
+
+	/* setup NOR Flash on CS0 and CS1 */
+	writel(0x00000b40, CS0WCR);
+	writel(0x10000c00, CS0BCR);
+	writel(0x00000b40, CS1WCR);
+	writel(0x10000c00, CS1BCR);
+	return 0;
+}
+
+/*
+ * The Genmai DT will most likely contain memory nodes describing the external
+ * SDRAM memory connected to CS2 and CS3, however we do not yet have any code
+ * in U-Boot to setup the memory controller. For now ignore DT and make use of
+ * the RZ/A1H on-chip memory which is 10 MiB at CFG_SYS_SDRAM_BASE.
+ */
+
+int dram_init(void)
+{
+	gd->ram_base = CFG_SYS_SDRAM_BASE;
+	gd->ram_size = 10 << 20;
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = gd->ram_base;
+	gd->bd->bi_dram[0].size = gd->ram_size;
+	return 0;
+}
diff --git a/configs/genmai_defconfig b/configs/genmai_defconfig
new file mode 100644
index 00000000000..d3407f671e2
--- /dev/null
+++ b/configs/genmai_defconfig
@@ -0,0 +1,17 @@
+#include <configs/renesas_rza1.config>
+
+CONFIG_ARM=y
+CONFIG_ARCH_RENESAS=y
+CONFIG_TEXT_BASE=0x00000000
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_DEFAULT_DEVICE_TREE="renesas/r7s72100-genmai"
+CONFIG_TARGET_GENMAI=y
+
+CONFIG_ENV_IS_IN_MTD=y
+CONFIG_ENV_MTD_DEV="nor0"
+CONFIG_ENV_OFFSET=0x80000
+CONFIG_ENV_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_ENV_SIZE=0x20000
+CONFIG_MTD=y
+CONFIG_SYS_MAX_FLASH_BANKS=2
diff --git a/include/configs/genmai.h b/include/configs/genmai.h
new file mode 100644
index 00000000000..1d43f8e06af
--- /dev/null
+++ b/include/configs/genmai.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Configuration settings for the Renesas GENMAI board
+ *
+ * Copyright (C) 2017-2019 Renesas Electronics
+ */
+
+#ifndef __GENMAI_H
+#define __GENMAI_H
+
+/* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */
+#define CFG_SYS_SDRAM_BASE		0x20000000
+#define CFG_SYS_SDRAM_SIZE		(10 * 1024 * 1024)
+
+#endif	/* __GENAMI_H */