diff options
| author | Marek Vasut <marek.vasut+renesas@mailbox.org> | 2024-07-13 15:19:12 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-07-15 12:12:17 -0600 |
| commit | 25cd2322aadbf53935e2ee5ae2a6b858482d1b9c (patch) | |
| tree | 2adea7547263a50595d5124de690dfdc65b19778 | |
| parent | b71125968e3a80ee2d59f98d0f4b37b5da03777e (diff) | |
arm: mach: socfpga: Remove duplicate newlines
Drop all duplicate newlines. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
| -rw-r--r-- | arch/arm/mach-socfpga/clock_manager_gen5.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/freeze_controller.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/include/mach/clock_manager_s10.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/misc_soc64.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-socfpga/reset_manager_gen5.c | 1 |
5 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/mach-socfpga/clock_manager_gen5.c b/arch/arm/mach-socfpga/clock_manager_gen5.c index 154ad2154ae..0a2c84c9e13 100644 --- a/arch/arm/mach-socfpga/clock_manager_gen5.c +++ b/arch/arm/mach-socfpga/clock_manager_gen5.c @@ -125,7 +125,6 @@ int cm_basic_init(const struct cm_config * const cfg) readl(socfpga_get_clkmgr_addr() + CLKMGR_GEN5_PERPLL_VCO); readl(socfpga_get_clkmgr_addr() + CLKMGR_GEN5_SDRPLL_VCO); - /* * We made sure bgpwr down was assert for 5 us. Now deassert BG PWR DN * with numerator and denominator. diff --git a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c index 7c86350d5ea..c8530c98043 100644 --- a/arch/arm/mach-socfpga/freeze_controller.c +++ b/arch/arm/mach-socfpga/freeze_controller.c @@ -3,7 +3,6 @@ * Copyright (C) 2013 Altera Corporation <www.altera.com> */ - #include <config.h> #include <asm/io.h> #include <asm/arch/clock_manager.h> diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h index 7f10296dc74..18921169a6d 100644 --- a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h +++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h @@ -106,7 +106,6 @@ void cm_basic_init(const struct cm_config * const cfg); #define CLKMGR_INTER CLKMGR_S10_INTER #define CLKMGR_PERPLL_EN CLKMGR_S10_PERPLL_EN - #define CLKMGR_CTRL_SAFEMODE BIT(0) #define CLKMGR_BYPASS_MAINPLL_ALL 0x00000007 #define CLKMGR_BYPASS_PERPLL_ALL 0x0000007f diff --git a/arch/arm/mach-socfpga/misc_soc64.c b/arch/arm/mach-socfpga/misc_soc64.c index ad1ef0db186..a6cc78454da 100644 --- a/arch/arm/mach-socfpga/misc_soc64.c +++ b/arch/arm/mach-socfpga/misc_soc64.c @@ -39,7 +39,6 @@ static Altera_desc altera_fpga[] = { }, }; - /* * Print CPU information */ diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c index 9395122dae1..6a202bf227c 100644 --- a/arch/arm/mach-socfpga/reset_manager_gen5.c +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c @@ -3,7 +3,6 @@ * Copyright (C) 2013 Altera Corporation <www.altera.com> */ - #include <mach/base_addr_ac5.h> #include <asm/io.h> #include <asm/arch/fpga_manager.h> |