diff options
| author | Ian Ray <ian.ray@gehealthcare.com> | 2024-11-08 16:03:55 +0200 |
|---|---|---|
| committer | Fabio Estevam <festevam@gmail.com> | 2024-11-09 08:55:04 -0300 |
| commit | 28958998f6301bc4a247a9057a623f997ee78c11 (patch) | |
| tree | 603e7225d4943d6d101e42e75cc480e4049fd02f | |
| parent | d6893740c15cc5aeaf2fd891217bef953b6328ed (diff) | |
arm: mach-imx: imx8m: re-use SNVS init routine
Working with HAB on the i.MX8MP we've encountered a case where a board
that successfully authenticates u-boot when booting Linux subsequently
fails to properly bring up the RTC.
The RTC registers live in the low-power block of the Secure Non-Volatile
Storage (SNVS) block.
The root cause of the error has been traced to the HAB handing off the
SNVS-RTC in a state where HPCOMR::NPSWA_EN = 0 in other words where the
Non-Privileged Software Access Enable bit is zero.
Configure SNVS to allow unpriv access to SNVS LP for imx8m and imx8mp.
This commit generalizes 723f8359c1 ("imx: mx7: snvs: Add an SNVS init
routine") to also be used on i.MX8M SoCs, and was testeed on i.MX8MP.
Signed-off-by: Ian Ray <ian.ray@gehealthcare.com>
| -rw-r--r-- | arch/arm/mach-imx/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/mach-imx/imx8m/soc.c | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 0de207c0681..011cca5d975 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -294,4 +294,4 @@ obj-$(CONFIG_ARCH_IMXRT) += imxrt/ obj-$(CONFIG_SPL_BOOTROM_SUPPORT) += spl_imx_romapi.o obj-$(CONFIG_IMX8_ROMAPI) += romapi.o -obj-$(CONFIG_MX7) += snvs.o +obj-$(CONFIG_MX7)$(CONFIG_IMX8M) += snvs.o diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 09a528a64f8..9588b8b28bf 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -34,6 +34,8 @@ #include <linux/bitfield.h> #include <linux/sizes.h> +#include "../snvs.h" + DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_IMX_HAB) @@ -576,6 +578,8 @@ static void imx8m_setup_snvs(void) writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR); /* Clear interrupt status */ writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR); + + init_snvs(); } static void imx8m_setup_csu_tzasc(void) |