ARM: stm32: Implement DDR3 coding on DHCOR SoM

The DHCOR board does exist in multiple variants with different DDR3
DRAM sizes. To cater for all of them, implement DDR3 code handling.
There are two GPIOs which code the DRAM size populated on the SoM,
read them out and use the value to pick the correct DDR3 config.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>

3 files changed, 29 insertions, 1 deletions

diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index 54f7ec57b79..c1702f88923 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -5,6 +5,7 @@
 
 #include <dt-bindings/clock/stm32mp1-clksrc.h>
 #include "stm32mp15-u-boot.dtsi"
+#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
 #include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
 
 / {
@@ -24,6 +25,7 @@
 		st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
 		st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
 		dh,som-coding-gpios = <&gpiof 12 0>, <&gpiof 13 0>, <&gpiof 15 0>;
+		dh,ddr3-coding-gpios = <&gpioz 6 0>, <&gpioz 7 0>;
 	};
 
 	led {
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
index aa81ed83930..c827e52b588 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
@@ -9,11 +9,13 @@
 
 #include <dt-bindings/clock/stm32mp1-clksrc.h>
 #include "stm32mp15-u-boot.dtsi"
+#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
 #include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
 
 / {
 	u-boot,dm-pre-reloc;
 	config {
+		dh,ddr3-coding-gpios = <&gpiog 0 0>, <&gpiog 1 0>;
 		dh,som-coding-gpios = <&gpioz 7 0>, <&gpiof 3 0>;
 	};
 };
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index 5193868d7cf..9a2926bbe50 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -135,6 +135,7 @@ int checkboard(void)
 
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 static u8 brdcode __section("data");
+static u8 ddr3code __section("data");
 static u8 somcode __section("data");
 
 static void board_get_coding_straps(void)
@@ -150,6 +151,7 @@ static void board_get_coding_straps(void)
 	}
 
 	brdcode = 0;
+	ddr3code = 0;
 	somcode = 0;
 
 	ret = gpio_request_list_by_name_nodev(node, "dh,som-coding-gpios",
@@ -158,13 +160,34 @@ static void board_get_coding_straps(void)
 	for (i = 0; i < ret; i++)
 		somcode |= !!dm_gpio_get_value(&(gpio[i])) << i;
 
+	ret = gpio_request_list_by_name_nodev(node, "dh,ddr3-coding-gpios",
+					      gpio, ARRAY_SIZE(gpio),
+					      GPIOD_IS_IN);
+	for (i = 0; i < ret; i++)
+		ddr3code |= !!dm_gpio_get_value(&(gpio[i])) << i;
+
 	ret = gpio_request_list_by_name_nodev(node, "dh,board-coding-gpios",
 					      gpio, ARRAY_SIZE(gpio),
 					      GPIOD_IS_IN);
 	for (i = 0; i < ret; i++)
 		brdcode |= !!dm_gpio_get_value(&(gpio[i])) << i;
 
-	printf("Code:  SoM:rev=%d Board:rev=%d\n", somcode, brdcode);
+	printf("Code:  SoM:rev=%d,ddr3=%d Board:rev=%d\n",
+		somcode, ddr3code, brdcode);
+}
+
+int board_stm32mp1_ddr_config_name_match(struct udevice *dev,
+					 const char *name)
+{
+	if (ddr3code == 2 &&
+	    !strcmp(name, "st,ddr3-1066-888-bin-g-1x4gb-533mhz"))
+		return 0;
+
+	if (ddr3code == 3 &&
+	    !strcmp(name, "st,ddr3-1066-888-bin-g-2x4gb-533mhz"))
+		return 0;
+
+	return -EINVAL;
 }
 
 int board_early_init_f(void)
@@ -537,6 +560,7 @@ int board_late_init(void)
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 	env_set_ulong("dh_som_rev", somcode);
 	env_set_ulong("dh_board_rev", brdcode);
+	env_set_ulong("dh_ddr3_code", ddr3code);
 #endif
 
 	return 0;