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authorSimon Glass <sjg@chromium.org>2025-03-15 14:25:36 +0000
committerTom Rini <trini@konsulko.com>2025-04-03 11:41:55 -0600
commit3c7ab12249a986267f0eb60dffaa85c1f254148e (patch)
treedf5a437cd4955ad1f84682eff937a0de4fc7659f
parentaae07e3df82e83ee4bd922dea34c9b35f2658b65 (diff)
x86: Tidy up the GDT size in start/16.S
Use a symbol to select the size of the GDT, rather than hard-coding a value. This matches how it is done in start64 Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/x86/cpu/start.S4
-rw-r--r--arch/x86/cpu/start16.S3
2 files changed, 5 insertions, 2 deletions
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 0ef27cc5a00..385a691265e 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -254,7 +254,7 @@ multiboot_header:
* GDT is setup in a safe location in RAM
*/
gdt_ptr2:
- .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
+ .word gdt2_end - gdt_ptr2 - 1
.long gdt_rom2 /* base */
/* Some CPUs are picky about GDT alignment... */
@@ -313,4 +313,6 @@ gdt_rom2:
.byte 0x93 /* access */
.byte 0xcf /* flags + limit_high */
.byte 0x00 /* base_high */
+gdt2_end:
+
#endif
diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S
index 865a49731e5..8d9acb193e0 100644
--- a/arch/x86/cpu/start16.S
+++ b/arch/x86/cpu/start16.S
@@ -61,7 +61,7 @@ idt_ptr:
* GDT is setup in a safe location in RAM
*/
gdt_ptr:
- .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
+ .word gdt_end - gdt_rom - 1
.long BOOT_SEG + gdt_rom /* base */
/* Some CPUs are picky about GDT alignment... */
@@ -120,3 +120,4 @@ gdt_rom:
.byte 0x93 /* access */
.byte 0xcf /* flags + limit_high */
.byte 0x00 /* base_high */
+gdt_end: