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authorPatrick Delaunay <patrick.delaunay@foss.st.com>2023-07-10 10:44:10 +0200
committerPatrice Chotard <patrice.chotard@foss.st.com>2023-08-25 09:29:18 +0200
commit3fce6bf213095121411fd8d8eb116a8cb1784141 (patch)
treea0d4285b9f1415904dcb30846e91d07bb51a7933
parentb2fb22396f97492fb5a2749dbd1bd9b6fdc30c71 (diff)
ARM: dts: stm32mp13: remove shmem for scmi-optee
CFG_STM32MP1_SCMI_SHM_SYSRAM will be disabled by default for STM32MP13x SoCs in next OP-TEE version and the OP-TEE SMCI server uses the OP-TEE native shared memory registered by clients. To be compatible by default with this configuration this patch removes the shared memory in the SCMI configuration and the associated reserved memory in SRAM. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
-rw-r--r--arch/arm/dts/stm32mp13-u-boot.dtsi8
-rw-r--r--arch/arm/dts/stm32mp131.dtsi14
2 files changed, 0 insertions, 22 deletions
diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi b/arch/arm/dts/stm32mp13-u-boot.dtsi
index 726cd1a7e47..aa5cfc6e41d 100644
--- a/arch/arm/dts/stm32mp13-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp13-u-boot.dtsi
@@ -108,14 +108,6 @@
bootph-all;
};
-&scmi_shm {
- bootph-all;
-};
-
-&scmi_sram {
- bootph-all;
-};
-
&syscfg {
bootph-all;
};
diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
index d163c267e34..d23bbc3639d 100644
--- a/arch/arm/dts/stm32mp131.dtsi
+++ b/arch/arm/dts/stm32mp131.dtsi
@@ -40,7 +40,6 @@
#address-cells = <1>;
#size-cells = <0>;
linaro,optee-channel-id = <0>;
- shmem = <&scmi_shm>;
scmi_clk: protocol@14 {
reg = <0x14>;
@@ -106,19 +105,6 @@
interrupt-parent = <&intc>;
ranges;
- scmi_sram: sram@2ffff000 {
- compatible = "mmio-sram";
- reg = <0x2ffff000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x2ffff000 0x1000>;
-
- scmi_shm: scmi-sram@0 {
- compatible = "arm,scmi-shmem";
- reg = <0 0x80>;
- };
- };
-
timers2: timer@40000000 {
#address-cells = <1>;
#size-cells = <0>;