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authorTom Rini <trini@konsulko.com>2025-03-31 11:06:14 -0600
committerTom Rini <trini@konsulko.com>2025-03-31 17:04:20 -0600
commit4a06b4b8efc39b6c8bf08225b18875f3c267bc2f (patch)
treeac77a681297895fe2325086a5610390361797e45
parentfd2bccec19d399b4a445009b3d514d2419cfbc95 (diff)
parentdbe3ea4274b005e05cf1ddaf1d6406e0e452720f (diff)
Merge patch series "Add WDT support for J7200 SOC"
Udit Kumar <u-kumar1@ti.com> says: This enables the ESMs and the associated PMIC. Programming these bits is a requirement to make the watchdog actually reset the board. After DT sync nodes bucka1 and main_esm has bootph property added in pmic nodes. RFC was sent https://lore.kernel.org/all/20241126063543.2678052-1-u-kumar1@ti.com/ With current patch boot logs https://gist.github.com/uditkumarti/adb647f86e6d166ea2d0ac98dceb7a9b reset: https://gist.github.com/uditkumarti/adb647f86e6d166ea2d0ac98dceb7a9b#file-gistfile1-txt-L2344 Link: https://lore.kernel.org/r/20250314110411.2781732-1-u-kumar1@ti.com
-rw-r--r--arch/arm/dts/k3-j7200-r5-common-proc-board.dts7
-rw-r--r--configs/j7200_evm_r5_defconfig2
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
index ecb1dd49c64..9ac29110324 100644
--- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
@@ -120,3 +120,10 @@
vdd-supply-2 = <&buckb1>;
bootph-pre-ram;
};
+
+&tps659414 {
+ esm: esm {
+ compatible = "ti,tps659413-esm";
+ bootph-pre-ram;
+ };
+};
diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig
index ae5849baf13..8df921c028b 100644
--- a/configs/j7200_evm_r5_defconfig
+++ b/configs/j7200_evm_r5_defconfig
@@ -99,7 +99,9 @@ CONFIG_DM_MAILBOX=y
CONFIG_K3_SEC_PROXY=y
CONFIG_FS_LOADER=y
CONFIG_SPL_FS_LOADER=y
+CONFIG_ESM_K3=y
CONFIG_K3_AVS0=y
+CONFIG_ESM_PMIC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_SPL_MMC_HS400_SUPPORT=y
CONFIG_MMC_SDHCI=y