diff options
| author | Alexander Sverdlin <alexander.sverdlin@siemens.com> | 2024-11-08 22:15:03 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2025-01-07 10:29:58 +0100 |
| commit | 5b5124e3d5cabac31d18fcd97c934aa13819fef6 (patch) | |
| tree | 383b5fe4e76a0e6588d021752042571780bf0ccf | |
| parent | 6d41f0a39d6423c8e57e92ebbe9f8c0333a63f72 (diff) | |
watchdog: rti: support SPL (or re-start)
If the RTI watchdog has been enabled in SPL, enabling it in U-Boot proper
fails because it can only be enabled once in HW and never stopped. This
however leads to a situation that wdt_cyclic() watchdog trigger is not
being started any longer and the WDT fires at some point.
Allow for WDT re-start by not bailing out if the [previously] configured
period matches the one to be configured.
Enabling in [A53] SPL has been tested on AM62x-based HW (where [A53] SPL is
responsible for loading R5 DM firmware and not this driver).
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Stefan Roese <sr@denx.de>
| -rw-r--r-- | drivers/watchdog/rti_wdt.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/watchdog/rti_wdt.c b/drivers/watchdog/rti_wdt.c index 99168d0cad0..320c5ca19e0 100644 --- a/drivers/watchdog/rti_wdt.c +++ b/drivers/watchdog/rti_wdt.c @@ -131,18 +131,19 @@ static int rti_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) u32 timer_margin; int ret; - if (readl(priv->regs + RTIDWDCTRL) == WDENABLE_KEY) + timer_margin = timeout_ms * priv->clk_hz / 1000; + timer_margin >>= WDT_PRELOAD_SHIFT; + if (timer_margin > WDT_PRELOAD_MAX) + timer_margin = WDT_PRELOAD_MAX; + + if (readl(priv->regs + RTIDWDCTRL) == WDENABLE_KEY && + readl(priv->regs + RTIDWDPRLD) != timer_margin) return -EBUSY; ret = rti_wdt_load_fw(dev); if (ret < 0) return ret; - timer_margin = timeout_ms * priv->clk_hz / 1000; - timer_margin >>= WDT_PRELOAD_SHIFT; - if (timer_margin > WDT_PRELOAD_MAX) - timer_margin = WDT_PRELOAD_MAX; - writel(timer_margin, priv->regs + RTIDWDPRLD); writel(RTIWWDRX_NMI, priv->regs + RTIWWDRXCTRL); writel(RTIWWDSIZE_50P, priv->regs + RTIWWDSIZECTRL); |