diff options
| author | Billy Tsai <billy_tsai@aspeedtech.com> | 2022-03-08 11:04:07 +0800 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-03-25 13:35:50 -0400 |
| commit | 5b66ebb4e97eb2d9f15db6b32602905cf6cdd033 (patch) | |
| tree | fc0b0383032c9c3fe000cbe329594f1fdb5c2c22 | |
| parent | 73ee1f261ee7f0fa67ec43276824dd6533c138fe (diff) | |
ARM: dts: ast2600: Add PWM to device tree
Add the PWM node and enable it for AST2600 EVB
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
| -rw-r--r-- | arch/arm/dts/ast2600-evb.dts | 20 | ||||
| -rw-r--r-- | arch/arm/dts/ast2600.dtsi | 15 |
2 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index c17988ec3cc..0d650543134 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -37,6 +37,26 @@ }; }; +&pwm { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default + &pinctrl_pwm1_default + &pinctrl_pwm2_default + &pinctrl_pwm3_default + &pinctrl_pwm4_default + &pinctrl_pwm5_default + &pinctrl_pwm6_default + &pinctrl_pwm7_default + &pinctrl_pwm8g1_default + &pinctrl_pwm9g1_default + &pinctrl_pwm10g1_default + &pinctrl_pwm11g1_default + &pinctrl_pwm12g1_default + &pinctrl_pwm13g1_default + &pinctrl_pwm14g1_default>; +}; + &uart5 { u-boot,dm-pre-reloc; status = "okay"; diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index ce006a37592..64074309b7b 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -113,6 +113,21 @@ reg = < 0x1e600000 0x100>; }; + pwm_tach: pwm_tach@1e610000 { + compatible = "aspeed,ast2600-pwm-tach", "simple-mfd", "syscon"; + reg = <0x1e610000 0x100>; + clocks = <&scu ASPEED_CLK_AHB>; + resets = <&rst ASPEED_RESET_PWM>; + + pwm: pwm { + compatible = "aspeed,ast2600-pwm"; + #pwm-cells = <3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + fmc: flash-controller@1e620000 { reg = < 0x1e620000 0xc4 0x20000000 0x10000000 >; |