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authorAaron Williams <awilliams@marvell.com>2020-12-11 17:05:29 +0100
committerStefan Roese <sr@denx.de>2021-04-28 10:05:10 +0200
commit66b75ef6e71643d73a3b69ba72a6752e6271e8b4 (patch)
treece50611017c2d163f96499f16ef41c5660268664
parent646af4d96c1029d46d033c4aa5638290d1e1c7dd (diff)
mips: octeon: Add cvmx-dbg-defs.h header file
Import cvmx-dbg-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r--arch/mips/mach-octeon/include/mach/cvmx-dbg-defs.h33
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/mips/mach-octeon/include/mach/cvmx-dbg-defs.h b/arch/mips/mach-octeon/include/mach/cvmx-dbg-defs.h
new file mode 100644
index 00000000000..9f91feec18b
--- /dev/null
+++ b/arch/mips/mach-octeon/include/mach/cvmx-dbg-defs.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2020 Marvell International Ltd.
+ *
+ * Configuration and status register (CSR) type definitions for
+ * Octeon dbg.
+ */
+
+#ifndef __CVMX_DBG_DEFS_H__
+#define __CVMX_DBG_DEFS_H__
+
+#define CVMX_DBG_DATA (0x00011F00000001E8ull)
+
+/**
+ * cvmx_dbg_data
+ *
+ * DBG_DATA = Debug Data Register
+ *
+ * Value returned on the debug-data lines from the RSLs
+ */
+union cvmx_dbg_data {
+ u64 u64;
+ struct cvmx_dbg_data_s {
+ u64 reserved_23_63 : 41;
+ u64 c_mul : 5;
+ u64 dsel_ext : 1;
+ u64 data : 17;
+ } s;
+};
+
+typedef union cvmx_dbg_data cvmx_dbg_data_t;
+
+#endif