diff options
| author | Tony Dinh <mibodhi@gmail.com> | 2023-06-20 16:20:22 -0700 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2023-07-13 10:26:27 +0200 |
| commit | 71222816d2e66ccc24f8edc8ae9d9a6f1c75f63c (patch) | |
| tree | 3033e88f56562d2529a5ccc2d44dc50fbaa7ab3f | |
| parent | f69f67e4ef4b2c81deeefe3fb23d0dec9a5de516 (diff) | |
arm: mvebu: Enable gpio-fan for Thecus N2350 board
Add gpio-fan in the DTS and enable the GPIO in board file to start the fan
during boot.
Note that this patch depends on
https://patchwork.ozlabs.org/project/uboot/patch/20230606214539.4229-1-mibodhi@gmail.com/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
| -rw-r--r-- | arch/arm/dts/armada-385-thecus-n2350.dts | 15 | ||||
| -rw-r--r-- | board/thecus/n2350/n2350.c | 2 |
2 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/dts/armada-385-thecus-n2350.dts b/arch/arm/dts/armada-385-thecus-n2350.dts index 2ad5158c0c9..253cf011308 100644 --- a/arch/arm/dts/armada-385-thecus-n2350.dts +++ b/arch/arm/dts/armada-385-thecus-n2350.dts @@ -140,6 +140,16 @@ }; }; + fan { + compatible = "gpio-fan"; + gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = < 0 0 + 600 1 + 3000 2 >; + pinctrl-0 = <&pmx_fan>; + pinctrl-names = "default"; + }; + usb3_0_power: v5-vbus0 { compatible = "regulator-fixed"; regulator-name = "USB3_0_Power"; @@ -378,6 +388,11 @@ marvell,pins = "mpp17"; marvell,function = "gpio"; }; + + pmx_fan: pmx-fan { + marvell,pins = "mpp48"; + marvell,function = "gpio"; + }; }; &sdhci { diff --git a/board/thecus/n2350/n2350.c b/board/thecus/n2350/n2350.c index fd8f95f9446..05b125fd7f8 100644 --- a/board/thecus/n2350/n2350.c +++ b/board/thecus/n2350/n2350.c @@ -25,7 +25,7 @@ DECLARE_GLOBAL_DATA_PTR; #define N2350_GPP_OUT_ENA_LOW (~(BIT(20) | BIT(21) | BIT(24))) #define N2350_GPP_OUT_ENA_MID (~(BIT(12) | BIT(13) | BIT(16) | BIT(19) | BIT(22))) #define N2350_GPP_OUT_VAL_LOW (BIT(21) | BIT(24)) -#define N2350_GPP_OUT_VAL_MID (BIT(0) | BIT(12) | BIT(13)) +#define N2350_GPP_OUT_VAL_MID (BIT(0) | BIT(12) | BIT(13) | BIT(16)) #define N2350_GPP_POL_LOW 0x0 #define N2350_GPP_POL_MID 0x0 |