diff options
| author | Tom Rini <trini@konsulko.com> | 2022-12-04 10:04:14 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-23 10:10:40 -0500 |
| commit | 7201b769784fd474f7e24c3fd2048588c69fb285 (patch) | |
| tree | 2a6589fee43bf0e48fcf656820a38f0690febd8d | |
| parent | 7b5f75cffabaa475add3c2f66d5ca0aa95588b5a (diff) | |
global: Migrate CONFIG_IRAM_TOP to CFG
Perform a simple rename of CONFIG_IRAM_TOP to CFG_IRAM_TOP
Signed-off-by: Tom Rini <trini@konsulko.com>
| -rw-r--r-- | arch/arm/mach-exynos/lowlevel_init.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-exynos/sec_boot.S | 2 | ||||
| -rw-r--r-- | include/configs/exynos5420-common.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c index 1ff5fcac1b3..9225d2cc1f2 100644 --- a/arch/arm/mach-exynos/lowlevel_init.c +++ b/arch/arm/mach-exynos/lowlevel_init.c @@ -51,7 +51,7 @@ enum { #ifdef CONFIG_EXYNOS5420 /* Address for relocating helper code (Last 4 KB of IRAM) */ -#define EXYNOS_RELOCATE_CODE_BASE (CONFIG_IRAM_TOP - 0x1000) +#define EXYNOS_RELOCATE_CODE_BASE (CFG_IRAM_TOP - 0x1000) /* * Power up secondary CPUs. diff --git a/arch/arm/mach-exynos/sec_boot.S b/arch/arm/mach-exynos/sec_boot.S index 40c07209e47..1303544d83b 100644 --- a/arch/arm/mach-exynos/sec_boot.S +++ b/arch/arm/mach-exynos/sec_boot.S @@ -21,7 +21,7 @@ relocate_wait_code: .ltorg /* * Secondary core waits here until Primary wake it up. - * Below code is copied to (CONFIG_IRAM_TOP - 0x1000) + * Below code is copied to (CFG_IRAM_TOP - 0x1000) * This is a workaround code which is supposed to act as a * substitute/supplement to the iROM code. * diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 934a4ef9d1f..99ab1a174f7 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -8,7 +8,7 @@ #ifndef __CONFIG_EXYNOS5420_H #define __CONFIG_EXYNOS5420_H -#define CONFIG_IRAM_TOP 0x02074000 +#define CFG_IRAM_TOP 0x02074000 #define CONFIG_PHY_IRAM_BASE 0x02020000 |