imx: kontron-sl-mx8mm: Convert to OF_UPSTREAM

Switch to OF_UPSTREAM to make use of the upstream devicetree.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>

6 files changed, 3 insertions, 1385 deletions

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b69eb7cbb94..f63af7c84c1 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -891,8 +891,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
 	imx8mm-data-modul-edm-sbc.dtb \
 	imx8mm-icore-mx8mm-ctouch2.dtb \
 	imx8mm-icore-mx8mm-edimm2.2.dtb \
-	imx8mm-kontron-bl.dtb \
-	imx8mm-kontron-bl-osm-s.dtb \
 	imx8mm-mx8menlo.dtb \
 	imx8mm-phg.dtb \
 	imx8mq-cm.dtb \
diff --git a/arch/arm/dts/imx8mm-kontron-bl-osm-s.dts b/arch/arm/dts/imx8mm-kontron-bl-osm-s.dts
deleted file mode 100644
index fae00fd9632..00000000000
--- a/arch/arm/dts/imx8mm-kontron-bl-osm-s.dts
+++ /dev/null
@@ -1,377 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright (C) 2022 Kontron Electronics GmbH
- */
-
-/dts-v1/;
-
-#include "imx8mm-kontron-osm-s.dtsi"
-
-/ {
-	model = "Kontron BL i.MX8MM OSM-S (N802X S)";
-	compatible = "kontron,imx8mm-bl-osm-s", "kontron,imx8mm-osm-s", "fsl,imx8mm";
-
-	aliases {
-		ethernet1 = &usbnet;
-	};
-
-	/* fixed crystal dedicated to mcp2542fd */
-	osc_can: clock-osc-can {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <40000000>;
-		clock-output-names = "osc-can";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_gpio_led>;
-
-		led1 {
-			label = "led1";
-			gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "heartbeat";
-		};
-
-		led2 {
-			label = "led2";
-			gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
-		};
-
-		led3 {
-			label = "led3";
-			gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	pwm-beeper {
-		compatible = "pwm-beeper";
-		pwms = <&pwm2 0 5000 0>;
-	};
-
-	reg_rst_eth2: regulator-rst-eth2 {
-		compatible = "regulator-fixed";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_usb_eth2>;
-		gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-		regulator-always-on;
-		regulator-name = "rst-usb-eth2";
-	};
-
-	reg_usb1_vbus: regulator-usb1-vbus {
-		compatible = "regulator-fixed";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_reg_usb1_vbus>;
-		gpio = <&gpio3 25 GPIO_ACTIVE_LOW>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-name = "usb1-vbus";
-	};
-
-	reg_vdd_5v: regulator-5v {
-		compatible = "regulator-fixed";
-		regulator-always-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-name = "vdd-5v";
-	};
-};
-
-&ecspi2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_ecspi2>;
-	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
-	status = "okay";
-
-	can@0 {
-		compatible = "microchip,mcp251xfd";
-		reg = <0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_can>;
-		clocks = <&osc_can>;
-		interrupts-extended = <&gpio4 28 IRQ_TYPE_LEVEL_LOW>;
-		/*
-		 * Limit the SPI clock to 15 MHz to prevent issues
-		 * with corrupted data due to chip errata.
-		 */
-		spi-max-frequency = <15000000>;
-		vdd-supply = <&reg_vdd_3v3>;
-		xceiver-supply = <&reg_vdd_5v>;
-	};
-};
-
-&ecspi3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_ecspi3>;
-	cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
-	status = "okay";
-
-	eeram@0 {
-		compatible = "microchip,48l640";
-		reg = <0>;
-		spi-max-frequency = <20000000>;
-	};
-};
-
-&fec1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_enet>;
-	phy-connection-type = "rgmii-rxid";
-	phy-handle = <&ethphy>;
-	status = "okay";
-
-	mdio {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		ethphy: ethernet-phy@0 {
-			reg = <0>;
-			reset-assert-us = <1>;
-			reset-deassert-us = <15000>;
-			reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
-		};
-	};
-};
-
-&gpio1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gpio1>;
-	gpio-line-names = "", "", "", "dio1-out", "", "", "dio1-in", "dio2-out",
-			  "dio2-in", "dio3-out", "dio3-in", "dio4-out", "", "", "", "",
-			  "", "", "", "", "", "", "", "",
-			  "", "", "", "", "", "", "", "";
-};
-
-&gpio5 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gpio5>;
-	gpio-line-names = "", "", "dio4-in", "", "", "", "", "",
-			  "", "", "", "", "", "", "", "",
-			  "", "", "", "", "", "", "", "",
-			  "", "", "", "", "", "", "", "";
-};
-
-&i2c4 {
-	clock-frequency = <100000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c4>;
-	status = "okay";
-};
-
-&pwm2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm2>;
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart1>;
-	uart-has-rtscts;
-	status = "okay";
-};
-
-&uart2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart2>;
-	linux,rs485-enabled-at-boot-time;
-	uart-has-rtscts;
-	status = "okay";
-};
-
-&usbotg1 {
-	dr_mode = "otg";
-	disable-over-current;
-	vbus-supply = <&reg_usb1_vbus>;
-	status = "okay";
-};
-
-&usbotg2 {
-	dr_mode = "host";
-	disable-over-current;
-	#address-cells = <1>;
-	#size-cells = <0>;
-	status = "okay";
-
-	usb1@1 {
-		compatible = "usb424,9514";
-		reg = <1>;
-		vdd-supply = <&reg_vdd_3v3>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		usbnet: ethernet@1 {
-			compatible = "usb424,ec00";
-			reg = <1>;
-			local-mac-address = [ 00 00 00 00 00 00 ];
-		};
-	};
-};
-
-&usdhc2 {
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc2>;
-	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
-	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
-	vmmc-supply = <&reg_vdd_3v3>;
-	vqmmc-supply = <&reg_nvcc_sd>;
-	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
-	status = "okay";
-};
-
-&iomuxc {
-	pinctrl_can: cangrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28		0x19
-		>;
-	};
-
-	pinctrl_ecspi2: ecspi2grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO		0x82
-			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI		0x82
-			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK		0x82
-			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13		0x19
-		>;
-	};
-
-	pinctrl_ecspi3: ecspi3grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO		0x82
-			MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI		0x82
-			MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK		0x82
-			MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25		0x19
-		>;
-	};
-
-	pinctrl_enet: enetgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_ENET_MDC_ENET1_MDC			0x3
-			MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO		0x3
-			MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
-			MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
-			MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
-			MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
-			MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
-			MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
-			MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
-			MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
-			MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
-			MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
-			MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
-			MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
-			MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1		0x19 /* PHY RST */
-			MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5		0x19 /* ETH IRQ */
-		>;
-	};
-
-	pinctrl_gpio_led: gpioledgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12		0x19
-			MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13		0x19
-			MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14		0x19
-		>;
-	};
-
-	pinctrl_gpio1: gpio1grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x19
-			MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7		0x19
-			MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9		0x19
-			MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11		0x19
-			MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6		0x19
-			MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8		0x19
-			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10		0x19
-		>;
-	};
-
-	pinctrl_gpio5: gpio5grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2		0x19
-		>;
-	};
-
-	pinctrl_i2c4: i2c4grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL			0x400001c3
-			MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA			0x400001c3
-		>;
-	};
-
-	pinctrl_pwm2: pwm2grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT			0x19
-		>;
-	};
-
-	pinctrl_reg_usb1_vbus: regusb1vbusgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25		0x19
-		>;
-	};
-
-	pinctrl_uart1: uart1grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX		0x140
-			MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX		0x140
-			MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B		0x140
-			MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B		0x140
-		>;
-	};
-
-	pinctrl_uart2: uart2grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX		0x140
-			MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX		0x140
-			MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B		0x140
-			MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B		0x140
-		>;
-	};
-
-	pinctrl_usb_eth2: usbeth2grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2		0x19
-		>;
-	};
-
-	pinctrl_usdhc2: usdhc2grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x190
-			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d0
-			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d0
-			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d0
-			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d0
-			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d0
-			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x1d0
-		>;
-	};
-
-	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x194
-			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d4
-			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d4
-			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d4
-			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d4
-			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d4
-			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x1d0
-		>;
-	};
-
-	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x196
-			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d6
-			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d6
-			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d6
-			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d6
-			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d6
-			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x1d0
-		>;
-	};
-};
diff --git a/arch/arm/dts/imx8mm-kontron-bl.dts b/arch/arm/dts/imx8mm-kontron-bl.dts
deleted file mode 100644
index dcec57c2039..00000000000
--- a/arch/arm/dts/imx8mm-kontron-bl.dts
+++ /dev/null
@@ -1,355 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright (C) 2019 Kontron Electronics GmbH
- */
-
-/dts-v1/;
-
-#include "imx8mm-kontron-sl.dtsi"
-
-/ {
-	model = "Kontron BL i.MX8MM (N801X S)";
-	compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm";
-
-	aliases {
-		ethernet1 = &usbnet;
-		rtc0 = &rx8900;
-		rtc1 = &snvs_rtc;
-	};
-
-	/* fixed crystal dedicated to mcp2515 */
-	osc_can: clock-osc-can {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <16000000>;
-		clock-output-names = "osc-can";
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_gpio_led>;
-
-		led1 {
-			label = "led1";
-			gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
-			linux,default-trigger = "heartbeat";
-		};
-
-		led2 {
-			label = "led2";
-			gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
-		};
-
-		led3 {
-			label = "led3";
-			gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
-		};
-
-		led4 {
-			label = "led4";
-			gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
-		};
-
-		led5 {
-			label = "led5";
-			gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
-		};
-
-		led6 {
-			label = "led6";
-			gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	pwm-beeper {
-		compatible = "pwm-beeper";
-		pwms = <&pwm2 0 5000 0>;
-	};
-
-	reg_rst_eth2: regulator-rst-eth2 {
-		compatible = "regulator-fixed";
-		regulator-name = "rst-usb-eth2";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_usb_eth2>;
-		gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-		regulator-always-on;
-	};
-
-	reg_vdd_5v: regulator-5v {
-		compatible = "regulator-fixed";
-		regulator-name = "vdd-5v";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-	};
-};
-
-&ecspi2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_ecspi2>;
-	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
-	status = "okay";
-
-	can0: can@0 {
-		compatible = "microchip,mcp2515";
-		reg = <0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_can>;
-		clocks = <&osc_can>;
-		interrupt-parent = <&gpio4>;
-		interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
-		spi-max-frequency = <10000000>;
-		vdd-supply = <&reg_vdd_3v3>;
-		xceiver-supply = <&reg_vdd_5v>;
-	};
-};
-
-&ecspi3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_ecspi3>;
-	cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
-	status = "okay";
-};
-
-&fec1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_enet>;
-	phy-connection-type = "rgmii-rxid";
-	phy-handle = <&ethphy>;
-	status = "okay";
-
-	mdio {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		ethphy: ethernet-phy@0 {
-			reg = <0>;
-			reset-assert-us = <1>;
-			reset-deassert-us = <15000>;
-			reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
-		};
-	};
-};
-
-&i2c4 {
-	clock-frequency = <100000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c4>;
-	status = "okay";
-
-	rx8900: rtc@32 {
-		compatible = "epson,rx8900";
-		reg = <0x32>;
-	};
-};
-
-&pwm2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_pwm2>;
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart1>;
-	uart-has-rtscts;
-	status = "okay";
-};
-
-&uart2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart2>;
-	linux,rs485-enabled-at-boot-time;
-	uart-has-rtscts;
-	status = "okay";
-};
-
-&usbotg1 {
-	dr_mode = "otg";
-	over-current-active-low;
-	status = "okay";
-};
-
-&usbotg2 {
-	dr_mode = "host";
-	disable-over-current;
-	#address-cells = <1>;
-	#size-cells = <0>;
-	status = "okay";
-
-	usb1@1 {
-		compatible = "usb424,9514";
-		reg = <1>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		usbnet: ethernet@1 {
-			compatible = "usb424,ec00";
-			reg = <1>;
-			local-mac-address = [ 00 00 00 00 00 00 ];
-		};
-	};
-};
-
-&usdhc2 {
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc2>;
-	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
-	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
-	vmmc-supply = <&reg_vdd_3v3>;
-	vqmmc-supply = <&reg_nvcc_sd>;
-	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
-	status = "okay";
-};
-
-&iomuxc {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_gpio>;
-
-	pinctrl_can: cangrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28		0x19
-		>;
-	};
-
-	pinctrl_ecspi2: ecspi2grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO		0x82
-			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI		0x82
-			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK		0x82
-			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13		0x19
-		>;
-	};
-
-	pinctrl_ecspi3: ecspi3grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO		0x82
-			MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI		0x82
-			MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK		0x82
-			MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25		0x19
-		>;
-	};
-
-	pinctrl_enet: enetgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_ENET_MDC_ENET1_MDC			0x3
-			MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO		0x3
-			MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
-			MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
-			MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
-			MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
-			MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
-			MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
-			MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
-			MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
-			MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
-			MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
-			MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
-			MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
-			MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27		0x19 /* PHY RST */
-			MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25		0x19 /* ETH IRQ */
-		>;
-	};
-
-	pinctrl_gpio_led: gpioledgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16		0x19
-			MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7		0x19
-			MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8		0x19
-			MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9		0x19
-			MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17		0x19
-			MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18		0x19
-			MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19		0x19
-		>;
-	};
-
-	pinctrl_gpio: gpiogrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x19
-			MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7		0x19
-			MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9		0x19
-			MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11		0x19
-			MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6		0x19
-			MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8		0x19
-			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10		0x19
-			MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2		0x19
-		>;
-	};
-
-	pinctrl_i2c4: i2c4grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL			0x400001c3
-			MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA			0x400001c3
-		>;
-	};
-
-	pinctrl_pwm2: pwm2grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT			0x19
-		>;
-	};
-
-	pinctrl_uart1: uart1grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX		0x140
-			MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX		0x140
-			MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B		0x140
-			MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B		0x140
-		>;
-	};
-
-	pinctrl_uart2: uart2grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX		0x140
-			MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX		0x140
-			MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B		0x140
-			MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B		0x140
-		>;
-	};
-
-	pinctrl_usb_eth2: usbeth2grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2		0x19
-		>;
-	};
-
-	pinctrl_usdhc2: usdhc2grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x190
-			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d0
-			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d0
-			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d0
-			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d0
-			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d0
-			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x1d0
-		>;
-	};
-
-	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x194
-			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d4
-			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d4
-			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d4
-			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d4
-			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d4
-			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x1d0
-		>;
-	};
-
-	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK			0x196
-			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD			0x1d6
-			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x1d6
-			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1		0x1d6
-			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2		0x1d6
-			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3		0x1d6
-			MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12		0x019
-			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x1d0
-		>;
-	};
-};
diff --git a/arch/arm/dts/imx8mm-kontron-osm-s.dtsi b/arch/arm/dts/imx8mm-kontron-osm-s.dtsi
deleted file mode 100644
index 695da2fa7c4..00000000000
--- a/arch/arm/dts/imx8mm-kontron-osm-s.dtsi
+++ /dev/null
@@ -1,335 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright (C) 2022 Kontron Electronics GmbH
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include "imx8mm.dtsi"
-
-/ {
-	model = "Kontron OSM-S i.MX8MM (N802X SOM)";
-	compatible = "kontron,imx8mm-osm-s", "fsl,imx8mm";
-
-	aliases {
-		rtc0 = &rv3028;
-		rtc1 = &snvs_rtc;
-	};
-
-	memory@40000000 {
-		device_type = "memory";
-		/*
-		 * There are multiple SoM flavors with different DDR sizes.
-		 * The smallest is 1GB. For larger sizes the bootloader will
-		 * update the reg property.
-		 */
-		reg = <0x0 0x40000000 0 0x80000000>;
-	};
-
-	chosen {
-		stdout-path = &uart3;
-	};
-};
-
-&A53_0 {
-	cpu-supply = <&reg_vdd_arm>;
-};
-
-&A53_1 {
-	cpu-supply = <&reg_vdd_arm>;
-};
-
-&A53_2 {
-	cpu-supply = <&reg_vdd_arm>;
-};
-
-&A53_3 {
-	cpu-supply = <&reg_vdd_arm>;
-};
-
-&ddrc {
-	operating-points-v2 = <&ddrc_opp_table>;
-
-	ddrc_opp_table: opp-table {
-		compatible = "operating-points-v2";
-
-		opp-100M {
-			opp-hz = /bits/ 64 <100000000>;
-		};
-
-		opp-750M {
-			opp-hz = /bits/ 64 <750000000>;
-		};
-	};
-};
-
-&ecspi1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_ecspi1>;
-	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
-	status = "okay";
-
-	flash@0 {
-		compatible = "mxicy,mx25r1635f", "jedec,spi-nor";
-		spi-max-frequency = <80000000>;
-		reg = <0>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x1e0000>;
-			};
-
-			partition@1e0000 {
-				label = "env";
-				reg = <0x1e0000 0x10000>;
-			};
-
-			partition@1f0000 {
-				label = "env_redundant";
-				reg = <0x1f0000 0x10000>;
-			};
-		};
-	};
-};
-
-&i2c1 {
-	clock-frequency = <400000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c1>;
-	status = "okay";
-
-	pca9450: pmic@25 {
-		compatible = "nxp,pca9450a";
-		reg = <0x25>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_pmic>;
-		interrupt-parent = <&gpio1>;
-		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-
-		regulators {
-			reg_vdd_soc: BUCK1 {
-				regulator-name = "+0V8_VDD_SOC (BUCK1)";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <850000>;
-				regulator-boot-on;
-				regulator-always-on;
-				regulator-ramp-delay = <3125>;
-				nxp,dvs-run-voltage = <850000>;
-				nxp,dvs-standby-voltage = <800000>;
-			};
-
-			reg_vdd_arm: BUCK2 {
-				regulator-name = "+0V9_VDD_ARM (BUCK2)";
-				regulator-min-microvolt = <850000>;
-				regulator-max-microvolt = <950000>;
-				regulator-boot-on;
-				regulator-always-on;
-				regulator-ramp-delay = <3125>;
-				nxp,dvs-run-voltage = <950000>;
-				nxp,dvs-standby-voltage = <850000>;
-			};
-
-			reg_vdd_dram: BUCK3 {
-				regulator-name = "+0V9_VDD_DRAM&PU (BUCK3)";
-				regulator-min-microvolt = <850000>;
-				regulator-max-microvolt = <950000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_vdd_3v3: BUCK4 {
-				regulator-name = "+3V3 (BUCK4)";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_vdd_1v8: BUCK5 {
-				regulator-name = "+1V8 (BUCK5)";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_nvcc_dram: BUCK6 {
-				regulator-name = "+1V1_NVCC_DRAM (BUCK6)";
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1100000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_nvcc_snvs: LDO1 {
-				regulator-name = "+1V8_NVCC_SNVS (LDO1)";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_vdd_snvs: LDO2 {
-				regulator-name = "+0V8_VDD_SNVS (LDO2)";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <900000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_vdda: LDO3 {
-				regulator-name = "+1V8_VDDA (LDO3)";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_vdd_phy: LDO4 {
-				regulator-name = "+0V9_VDD_PHY (LDO4)";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_nvcc_sd: LDO5 {
-				regulator-name = "NVCC_SD (LDO5)";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-			};
-		};
-	};
-
-	rv3028: rtc@52 {
-		compatible = "microcrystal,rv3028";
-		reg = <0x52>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_rtc>;
-		interrupts-extended = <&gpio4 1 IRQ_TYPE_LEVEL_HIGH>;
-		trickle-diode-disable;
-	};
-};
-
-&uart3 { /* console */
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart3>;
-	status = "okay";
-};
-
-&usdhc1 {
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc1>;
-	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
-	vmmc-supply = <&reg_vdd_3v3>;
-	vqmmc-supply = <&reg_vdd_1v8>;
-	bus-width = <8>;
-	non-removable;
-	status = "okay";
-};
-
-&wdog1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_wdog>;
-	fsl,ext-reset-output;
-	status = "okay";
-};
-
-&iomuxc {
-	pinctrl_ecspi1: ecspi1grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO		0x82
-			MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI		0x82
-			MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK		0x82
-			MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9		0x19
-		>;
-	};
-
-	pinctrl_i2c1: i2c1grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL			0x400001c3
-			MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA			0x400001c3
-		>;
-	};
-
-	pinctrl_pmic: pmicgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0		0x141
-		>;
-	};
-
-	pinctrl_rtc: rtcgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1			0x19
-		>;
-	};
-
-	pinctrl_uart3: uart3grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX		0x140
-			MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX		0x140
-		>;
-	};
-
-	pinctrl_usdhc1: usdhc1grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK			0x190
-			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD			0x1d0
-			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0		0x1d0
-			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1		0x1d0
-			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2		0x1d0
-			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3		0x1d0
-			MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4		0x1d0
-			MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5		0x1d0
-			MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6		0x1d0
-			MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7		0x1d0
-			MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0x019
-			MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x190
-		>;
-	};
-
-	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK			0x194
-			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD			0x1d4
-			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0		0x1d4
-			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1		0x1d4
-			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2		0x1d4
-			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3		0x1d4
-			MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4		0x1d4
-			MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5		0x1d4
-			MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6		0x1d4
-			MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7		0x1d4
-			MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0x019
-			MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x194
-		>;
-	};
-
-	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK			0x196
-			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD			0x1d6
-			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0		0x1d6
-			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1		0x1d6
-			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2		0x1d6
-			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3		0x1d6
-			MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4		0x1d6
-			MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5		0x1d6
-			MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6		0x1d6
-			MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7		0x1d6
-			MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0x019
-			MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x196
-		>;
-	};
-
-	pinctrl_wdog: wdoggrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B		0xc6
-		>;
-	};
-};
diff --git a/arch/arm/dts/imx8mm-kontron-sl.dtsi b/arch/arm/dts/imx8mm-kontron-sl.dtsi
deleted file mode 100644
index 0679728d248..00000000000
--- a/arch/arm/dts/imx8mm-kontron-sl.dtsi
+++ /dev/null
@@ -1,314 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+ OR MIT
-/*
- * Copyright (C) 2019 Kontron Electronics GmbH
- */
-
-#include "imx8mm.dtsi"
-
-/ {
-	model = "Kontron SL i.MX8MM (N801X SOM)";
-	compatible = "kontron,imx8mm-sl", "fsl,imx8mm";
-
-	memory@40000000 {
-		device_type = "memory";
-		/*
-		 * There are multiple SoM flavors with different DDR sizes.
-		 * The smallest is 1GB. For larger sizes the bootloader will
-		 * update the reg property.
-		 */
-		reg = <0x0 0x40000000 0 0x80000000>;
-	};
-
-	chosen {
-		stdout-path = &uart3;
-	};
-};
-
-&A53_0 {
-	cpu-supply = <&reg_vdd_arm>;
-};
-
-&A53_1 {
-	cpu-supply = <&reg_vdd_arm>;
-};
-
-&A53_2 {
-	cpu-supply = <&reg_vdd_arm>;
-};
-
-&A53_3 {
-	cpu-supply = <&reg_vdd_arm>;
-};
-
-&ddrc {
-	operating-points-v2 = <&ddrc_opp_table>;
-
-	ddrc_opp_table: opp-table {
-		compatible = "operating-points-v2";
-
-		opp-100M {
-			opp-hz = /bits/ 64 <100000000>;
-		};
-
-		opp-750M {
-			opp-hz = /bits/ 64 <750000000>;
-		};
-	};
-};
-
-&ecspi1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_ecspi1>;
-	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
-	status = "okay";
-
-	flash@0 {
-		compatible = "mxicy,mx25r1635f", "jedec,spi-nor";
-		spi-max-frequency = <80000000>;
-		reg = <0>;
-
-		partitions {
-			compatible = "fixed-partitions";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			partition@0 {
-				label = "u-boot";
-				reg = <0x0 0x1e0000>;
-			};
-
-			partition@1e0000 {
-				label = "env";
-				reg = <0x1e0000 0x10000>;
-			};
-
-			partition@1f0000 {
-				label = "env_redundant";
-				reg = <0x1f0000 0x10000>;
-			};
-		};
-	};
-};
-
-&i2c1 {
-	clock-frequency = <400000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c1>;
-	status = "okay";
-
-	pca9450: pmic@25 {
-		compatible = "nxp,pca9450a";
-		reg = <0x25>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_pmic>;
-		interrupt-parent = <&gpio1>;
-		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
-
-		regulators {
-			reg_vdd_soc: BUCK1 {
-				regulator-name = "+0V8_VDD_SOC (BUCK1)";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <850000>;
-				regulator-boot-on;
-				regulator-always-on;
-				regulator-ramp-delay = <3125>;
-				nxp,dvs-run-voltage = <850000>;
-				nxp,dvs-standby-voltage = <800000>;
-			};
-
-			reg_vdd_arm: BUCK2 {
-				regulator-name = "+0V9_VDD_ARM (BUCK2)";
-				regulator-min-microvolt = <850000>;
-				regulator-max-microvolt = <950000>;
-				regulator-boot-on;
-				regulator-always-on;
-				regulator-ramp-delay = <3125>;
-				nxp,dvs-run-voltage = <950000>;
-				nxp,dvs-standby-voltage = <850000>;
-			};
-
-			reg_vdd_dram: BUCK3 {
-				regulator-name = "+0V9_VDD_DRAM&PU (BUCK3)";
-				regulator-min-microvolt = <850000>;
-				regulator-max-microvolt = <950000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_vdd_3v3: BUCK4 {
-				regulator-name = "+3V3 (BUCK4)";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_vdd_1v8: BUCK5 {
-				regulator-name = "+1V8 (BUCK5)";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_nvcc_dram: BUCK6 {
-				regulator-name = "+1V1_NVCC_DRAM (BUCK6)";
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1100000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_nvcc_snvs: LDO1 {
-				regulator-name = "+1V8_NVCC_SNVS (LDO1)";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_vdd_snvs: LDO2 {
-				regulator-name = "+0V8_VDD_SNVS (LDO2)";
-				regulator-min-microvolt = <800000>;
-				regulator-max-microvolt = <900000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_vdda: LDO3 {
-				regulator-name = "+1V8_VDDA (LDO3)";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_vdd_phy: LDO4 {
-				regulator-name = "+0V9_VDD_PHY (LDO4)";
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <900000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			reg_nvcc_sd: LDO5 {
-				regulator-name = "NVCC_SD (LDO5)";
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3300000>;
-			};
-		};
-	};
-};
-
-&uart3 { /* console */
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart3>;
-	status = "okay";
-};
-
-&usdhc1 {
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc1>;
-	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
-	vmmc-supply = <&reg_vdd_3v3>;
-	vqmmc-supply = <&reg_vdd_1v8>;
-	bus-width = <8>;
-	non-removable;
-	status = "okay";
-};
-
-&wdog1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_wdog>;
-	fsl,ext-reset-output;
-	status = "okay";
-};
-
-&iomuxc {
-	pinctrl_ecspi1: ecspi1grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO		0x82
-			MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI		0x82
-			MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK		0x82
-			MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9		0x19
-		>;
-	};
-
-	pinctrl_i2c1: i2c1grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL			0x400001c3
-			MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA			0x400001c3
-		>;
-	};
-
-	pinctrl_pmic: pmicgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0		0x141
-		>;
-	};
-
-	pinctrl_uart3: uart3grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX		0x140
-			MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX		0x140
-		>;
-	};
-
-	pinctrl_usdhc1: usdhc1grp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK			0x190
-			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD			0x1d0
-			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0		0x1d0
-			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1		0x1d0
-			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2		0x1d0
-			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3		0x1d0
-			MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4		0x1d0
-			MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5		0x1d0
-			MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6		0x1d0
-			MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7		0x1d0
-			MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0x019
-			MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x190
-		>;
-	};
-
-	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK			0x194
-			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD			0x1d4
-			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0		0x1d4
-			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1		0x1d4
-			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2		0x1d4
-			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3		0x1d4
-			MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4		0x1d4
-			MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5		0x1d4
-			MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6		0x1d4
-			MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7		0x1d4
-			MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0x019
-			MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x194
-		>;
-	};
-
-	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK			0x196
-			MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD			0x1d6
-			MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0		0x1d6
-			MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1		0x1d6
-			MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2		0x1d6
-			MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3		0x1d6
-			MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4		0x1d6
-			MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5		0x1d6
-			MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6		0x1d6
-			MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7		0x1d6
-			MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0x019
-			MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x196
-		>;
-	};
-
-	pinctrl_wdog: wdoggrp {
-		fsl,pins = <
-			MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B		0xc6
-		>;
-	};
-};
diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig
index f9484b908d9..42346a305f9 100644
--- a/configs/kontron-sl-mx8mm_defconfig
+++ b/configs/kontron-sl-mx8mm_defconfig
@@ -12,7 +12,7 @@ CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_IMX_CONFIG="board/kontron/sl-mx8mm/imximage.cfg"
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="imx8mm-kontron-bl"
+CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mm-kontron-bl"
 CONFIG_TARGET_KONTRON_MX8MM=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_SPL_MMC=y
@@ -111,7 +111,8 @@ CONFIG_CMD_FS_UUID=y
 CONFIG_PARTITION_TYPE_GUID=y
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
-CONFIG_OF_LIST="imx8mm-kontron-bl imx8mm-kontron-bl-osm-s"
+CONFIG_OF_UPSTREAM=y
+CONFIG_OF_LIST="freescale/imx8mm-kontron-bl freescale/imx8mm-kontron-bl-osm-s"
 CONFIG_ENV_IS_NOWHERE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y