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authorJosua Mayer <josua@solid-run.com>2025-02-07 16:06:08 +0100
committerStefan Roese <sr@denx.de>2025-04-16 08:05:15 +0200
commit873f6f9a3fd3f26a6fece7e45d6e19930e3eabf0 (patch)
tree8f2c8ebe185f4f4d5d53b8e1b8de6b283df51efd
parenta08425586799374ccded78eb5fdef6e2235e1ad9 (diff)
board: kobol: helios4: enable ddr odt0 on write for both chip-select
Enabling ODT is required to suppress reflection of the data signal on DDR write operation. SolidRun Armada 388 SoM only connects M_ODT[0] even when both chip-select are used. Enable ODT[0] for both chip-select during write only. See also commit d09f199097d3 ("board: solidrun: clearfog: enable ddr odt0 on write for both chip-select") where this was added to SolidRun Clearfog board which is using the same System on Module but unlike Helios-4 without ECC memory. Signed-off-by: Josua Mayer <josua@solid-run.com>
-rw-r--r--board/kobol/helios4/helios4.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/board/kobol/helios4/helios4.c b/board/kobol/helios4/helios4.c
index 4c8407bb676..7714076edf1 100644
--- a/board/kobol/helios4/helios4.c
+++ b/board/kobol/helios4/helios4.c
@@ -73,7 +73,11 @@ static struct mv_ddr_topology_map board_topology_map = {
MV_DDR_CFG_DEFAULT, /* ddr configuration data source */
NOT_COMBINED, /* ddr twin-die combined */
{ {0} }, /* raw spd data */
- {0} /* timing parameters */
+ {0}, /* timing parameters */
+ { {0} }, /* electrical configuration */
+ {0,}, /* electrical parameters */
+ 0x30000, /* ODT configuration */
+ 0x3, /* clock enable mask */
};
struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)