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| author | Caleb Connolly <caleb.connolly@linaro.org> | 2024-04-15 16:03:38 +0100 |
|---|---|---|
| committer | Caleb Connolly <caleb.connolly@linaro.org> | 2024-04-23 13:29:14 +0200 |
| commit | 8a4e0433056abd07531e59b5fc5c2a8846bfc3b8 (patch) | |
| tree | 4edbe34908b9a3db5409df126e206b0701e0aaac | |
| parent | 615a3e909e36d7e615f5da1c2c46e58e0025d23f (diff) | |
clk/qcom: apq8016: return valid rate when setting UART clock
The clk_init_uart() helper always returns 0, but we're meant to return a
real clock rate. Given that we hardcode 115200 baud, just return the
clock rate that we set.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
| -rw-r--r-- | drivers/clk/qcom/clock-apq8016.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c index 5a5868169c8..6210fba8798 100644 --- a/drivers/clk/qcom/clock-apq8016.c +++ b/drivers/clk/qcom/clock-apq8016.c @@ -100,8 +100,8 @@ static ulong apq8016_clk_set_rate(struct clk *clk, ulong rate) return clk_init_sdc(priv, 1, rate); break; case GCC_BLSP1_UART2_APPS_CLK: /* UART2 */ - return apq8016_clk_init_uart(priv->base); - break; + apq8016_clk_init_uart(priv->base); + return 7372800; default: return 0; } |