diff options
author | Andre Przywara <andre.przywara@arm.com> | 2022-12-18 00:12:07 +0000 |
---|---|---|
committer | Andre Przywara <andre.przywara@arm.com> | 2023-10-22 23:41:51 +0100 |
commit | 8bddb9742bedaffacf5cd0dfdaa443079a216ca9 (patch) | |
tree | 077f8af3383e521b17b1d83adf9528de9793c12d | |
parent | a94c9c809b26c9fbc58dcc2796ff879fc56b0c7e (diff) |
Kconfig: sunxi: prepare for using drivers/ram/sunxi
At the moment all Allwinner DRAM initialisation routines are stored in
arch/arm/mach-sunxi, even though those "drivers" are just a giant
collection of writel's, without any architectural dependency.
The R528/T113-s SoC (with ARM cores) and the D1/D1s Soc (with RISC-V
cores) share the same die, so should share the same DRAM init routines as
well.
To prepare for this, add a new sunxi directory inside drivers/ram, and
add some stub entries to prepare for the addition of the share DRAM code
for those SoCs.
The RISC-V D1(s) SoCs will probably use SPL_DM, so for that SoC this
would be the right directory anyway.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
-rw-r--r-- | drivers/ram/Kconfig | 3 | ||||
-rw-r--r-- | drivers/ram/sunxi/Kconfig | 6 |
2 files changed, 8 insertions, 1 deletions
diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index bf999645774..5b07e920301 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -109,8 +109,9 @@ config IMXRT_SDRAM source "drivers/ram/aspeed/Kconfig" source "drivers/ram/cadence/Kconfig" +source "drivers/ram/octeon/Kconfig" source "drivers/ram/rockchip/Kconfig" source "drivers/ram/sifive/Kconfig" source "drivers/ram/stm32mp1/Kconfig" -source "drivers/ram/octeon/Kconfig" source "drivers/ram/starfive/Kconfig" +source "drivers/ram/sunxi/Kconfig" diff --git a/drivers/ram/sunxi/Kconfig b/drivers/ram/sunxi/Kconfig new file mode 100644 index 00000000000..d7cf84c39a3 --- /dev/null +++ b/drivers/ram/sunxi/Kconfig @@ -0,0 +1,6 @@ +config DRAM_SUN20I_D1 + bool + depends on ARCH_SUNXI + help + This enables support for the DRAM controller driver covering + the Allwinner D1/R528/T113s SoCs. |