diff options
| author | Vishal Sagar <vishal.sagar@amd.com> | 2024-03-21 16:54:56 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2024-03-25 15:21:10 +0100 |
| commit | 8e462bf3bdea694dbc359de5933fd3aabd8c7ac3 (patch) | |
| tree | 24d1090dd577db4cbbdb15ac18391c7131d595f1 | |
| parent | 9df352222ed430ef98f41eefc3a8640e889f6288 (diff) | |
arm64: zynqmp: Describe DisplayPort connector for Kria
Add a device tree node to describe the DisplayPort connector, and
connect it to the DPSUB output.
The patch was tested on kv260-revB/rev2 and also kr260-revB.
Signed-off-by: Vishal Sagar <vishal.sagar@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c8738cb9951c73c6c00a4ce8d0025fb372372346.1711036494.git.michal.simek@amd.com
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 20 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-sck-kv-g-revB.dtso | 20 |
2 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso index 6c29f657413..0a0cbd2b69a 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso @@ -66,6 +66,18 @@ #clock-cells = <0>; clock-frequency = <74250000>; }; + + dpcon { + compatible = "dp-connector"; + label = "P11"; + type = "full-size"; + + port { + dpcon_in: endpoint { + remote-endpoint = <&dpsub_dp_out>; + }; + }; + }; }; &i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */ @@ -130,6 +142,14 @@ phy-names = "dp-phy0"; phys = <&psgtr 1 PHY_TYPE_DP 0 1>; assigned-clock-rates = <27000000>, <25000000>, <300000000>; + + ports { + port@5 { + dpsub_dp_out: endpoint { + remote-endpoint = <&dpcon_in>; + }; + }; + }; }; &zynqmp_dpdma { diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso index 13876fb47db..64683e0ccbb 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso @@ -63,6 +63,18 @@ #clock-cells = <0>; clock-frequency = <27000000>; }; + + dpcon { + compatible = "dp-connector"; + label = "P11"; + type = "full-size"; + + port { + dpcon_in: endpoint { + remote-endpoint = <&dpsub_dp_out>; + }; + }; + }; }; &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ @@ -97,6 +109,14 @@ phy-names = "dp-phy0", "dp-phy1"; phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>; assigned-clock-rates = <27000000>, <25000000>, <300000000>; + + ports { + port@5 { + dpsub_dp_out: endpoint { + remote-endpoint = <&dpcon_in>; + }; + }; + }; }; &zynqmp_dpdma { |