diff options
| author | Zixun LI <admin@hifiphile.com> | 2025-04-28 11:16:24 +0200 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@linaro.org> | 2025-06-19 13:56:13 +0300 |
| commit | 98a83fc23bfedc85016e9db98ba459805232180d (patch) | |
| tree | b7fb2c1938ac71a0d31f1b2168ee345be19b4ecb | |
| parent | c7e4262580c5ce76aa8669b3fe336c29b563dca2 (diff) | |
arm: at91: wdt: Rename regval in priv data to mr
Use the name "mr" since we are referring to timer mode register.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Stefan Roese <sr@denx.de>
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91_wdt.h | 2 | ||||
| -rw-r--r-- | drivers/watchdog/at91sam9_wdt.c | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91_wdt.h b/arch/arm/mach-at91/include/mach/at91_wdt.h index 5ba9dffd8a9..a203210cc6b 100644 --- a/arch/arm/mach-at91/include/mach/at91_wdt.h +++ b/arch/arm/mach-at91/include/mach/at91_wdt.h @@ -21,7 +21,7 @@ struct at91_wdt_priv { void __iomem *regs; - u32 regval; + u32 mr; }; #endif diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c index c809a8936b8..dab7b6a9b8c 100644 --- a/drivers/watchdog/at91sam9_wdt.c +++ b/drivers/watchdog/at91sam9_wdt.c @@ -60,11 +60,11 @@ static int at91_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags) * Since WDV is a 12-bit counter, the maximum period is * 4096 / 256 = 16 seconds. */ - priv->regval = AT91_WDT_MR_WDRSTEN /* causes watchdog reset */ + priv->mr = AT91_WDT_MR_WDRSTEN /* causes watchdog reset */ | AT91_WDT_MR_WDDBGHLT /* disabled in debug mode */ | AT91_WDT_MR_WDD(0xfff) /* restart at any time */ | AT91_WDT_MR_WDV(ticks); /* timer value */ - writel(priv->regval, priv->regs + AT91_WDT_MR); + writel(priv->mr, priv->regs + AT91_WDT_MR); return 0; } @@ -74,8 +74,8 @@ static int at91_wdt_stop(struct udevice *dev) struct at91_wdt_priv *priv = dev_get_priv(dev); /* Disable Watchdog Timer */ - priv->regval |= AT91_WDT_MR_WDDIS; - writel(priv->regval, priv->regs + AT91_WDT_MR); + priv->mr |= AT91_WDT_MR_WDDIS; + writel(priv->mr, priv->regs + AT91_WDT_MR); return 0; } |