diff options
author | Rafael Beims <rafael.beims@toradex.com> | 2025-03-28 11:20:40 +0100 |
---|---|---|
committer | Fabio Estevam <festevam@gmail.com> | 2025-04-11 08:25:54 -0300 |
commit | a3139fe0572ed39db3b0be526d71e1d23cb8c467 (patch) | |
tree | 775262c9852be5155c697e130c4cdb219c63ac8b | |
parent | f86a377f1fe73b143e8fbb1e0599d96018ed02bc (diff) |
toradex: apalis-imx6: Fix build failure when CONFIG_VIDEO_IPUV3 is enabled
If CONFIG_VIDEO_IPUV3 is enabled without also having CONFIG_IMX_HDMI
enabled, the build fails for the Apalis iMX6 board.
Fixes: 592f4aed6db7 ("arm: imx: initial support for apalis imx6")
Signed-off-by: Rafael Beims <rafael.beims@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
-rw-r--r-- | board/toradex/apalis_imx6/apalis_imx6.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index e0a7c661270..542c7ba4608 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -466,10 +466,12 @@ static iomux_v3_cfg_t const rgb_pads[] = { MX6_PAD_EIM_D31__IPU1_DISP1_DATA20 | MUX_PAD_CTRL(OUTPUT_RGB), }; +#ifdef CONFIG_IMX_HDMI static void do_enable_hdmi(struct display_info_t const *dev) { imx_enable_hdmi_phy(); } +#endif static void enable_lvds(struct display_info_t const *dev) { @@ -499,7 +501,9 @@ static int detect_default(struct display_info_t const *dev) return 1; } -struct display_info_t const displays[] = {{ +struct display_info_t const displays[] = { +#ifdef CONFIG_IMX_HDMI +{ .bus = -1, .addr = 0, .pixfmt = IPU_PIX_FMT_RGB24, @@ -519,7 +523,9 @@ struct display_info_t const displays[] = {{ .vsync_len = 10, .sync = FB_SYNC_EXT, .vmode = FB_VMODE_NONINTERLACED -} }, { +} }, +#endif +{ .bus = -1, .addr = 0, .di = 1, @@ -589,7 +595,11 @@ static void setup_display(void) int reg; enable_ipu_clock(); + +#ifdef CONFIG_IMX_HDMI imx_setup_hdmi(); +#endif + /* Turn on LDB0,IPU,IPU DI0 clocks */ reg = __raw_readl(&mxc_ccm->CCGR3); reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; |