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authorHrushikesh Salunke <h-salunke@ti.com>2025-04-16 17:38:29 +0530
committerTom Rini <trini@konsulko.com>2025-04-24 10:45:49 -0600
commita478d0f05b20b96e0911d78ddf1751ba94e171fc (patch)
treeb514f6ed17050f8847d41f2c7ebe29b0bbb28db8
parent29602a52903f34653081e6ecbaa4a5ab056409b9 (diff)
pci: pcie_cdns_ti: Enable PCIe root-complex mode in AM64 SoC
TI's AM64 SoC has single instance of PCIe Controller namely PCIe0 which is Cadence PCIe Controller. Add support to configure PCIe0 in Root- Complex mode of operation. Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
-rw-r--r--drivers/pci/pcie_cdns_ti.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/pci/pcie_cdns_ti.c b/drivers/pci/pcie_cdns_ti.c
index e5bcc6eb53e..9d1d123a18c 100644
--- a/drivers/pci/pcie_cdns_ti.c
+++ b/drivers/pci/pcie_cdns_ti.c
@@ -835,11 +835,21 @@ static const struct pcie_cdns_ti_data j7200_pcie_rc_data = {
.max_lanes = 2,
};
+static const struct pcie_cdns_ti_data am64_pcie_rc_data = {
+ .mode = PCIE_MODE_RC,
+ .quirk_detect_quiet_flag = true,
+ .max_lanes = 1,
+};
+
static const struct udevice_id pcie_cdns_ti_ids[] = {
{
.compatible = "ti,j7200-pcie-host",
.data = (ulong)&j7200_pcie_rc_data,
},
+ {
+ .compatible = "ti,am64-pcie-host",
+ .data = (ulong)&am64_pcie_rc_data,
+ },
{},
};