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authorWadim Egorov <w.egorov@phytec.de>2025-03-25 04:58:17 +0100
committerTom Rini <trini@konsulko.com>2025-04-10 15:03:32 -0600
commita936352f9e00206016badaaa217f034dde7b00a2 (patch)
treeb546f7dbe311177bff01a719b5a79833eb5e1a17
parent47f433d577a0e1e937c12bbdf632119f0c8b492e (diff)
arm: dts: k3-am625-phyboard-lyra-rdk: Add boot phase tag to phy_gmii_sel
Add bootph-all tag to phy_gmii_sel node. This is needed for booting via Ethernet. While at it, drop main_pktdma reg redefinitions which are already provided by the top-level SoC device tree file. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Tested-by: Daniel Schultz <d.schultz@phytec.de>
-rw-r--r--arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi14
1 files changed, 4 insertions, 10 deletions
diff --git a/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi b/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
index 2bc5acbec23..253ca297e12 100644
--- a/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi
@@ -42,6 +42,10 @@
bootph-all;
};
+&phy_gmii_sel {
+ bootph-all;
+};
+
&fss {
bootph-all;
};
@@ -86,16 +90,6 @@
&main_pktdma {
bootph-all;
- reg = <0x00 0x485c0000 0x00 0x100>,
- <0x00 0x4a800000 0x00 0x20000>,
- <0x00 0x4aa00000 0x00 0x20000>,
- <0x00 0x4b800000 0x00 0x200000>,
- <0x00 0x485e0000 0x00 0x10000>,
- <0x00 0x484a0000 0x00 0x2000>,
- <0x00 0x484c0000 0x00 0x2000>,
- <0x00 0x48430000 0x00 0x1000>;
- reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
- "cfg", "tchan", "rchan", "rflow";
};
&main_rgmii1_pins_default {