diff options
| author | Nicolas Ferre <nicolas.ferre@microchip.com> | 2020-10-30 18:33:14 +0100 |
|---|---|---|
| committer | Eugen Hristev <eugen.hristev@microchip.com> | 2021-01-07 09:44:16 +0200 |
| commit | aeaef07c5124afbe848f727a24019cf432f5e011 (patch) | |
| tree | b087fbcc76216b0db2e838e399656ea42567be88 | |
| parent | 05176cd08f352e63ad9d8b2627184a31edaaa51e (diff) | |
ARM: dts: sama7g5ek: fix TXC pin configuration
TXC line is directly connected from the SoC to the KSZ9131 PHY. There
is a transient state on this signal, before configuring it to RGMII,
which leads to packet transmit being blocked.
Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes
the issue.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
| -rw-r--r-- | arch/arm/dts/sama7g5ek.dts | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts index b7c35559fe8..ff9c9eb45c6 100644 --- a/arch/arm/dts/sama7g5ek.dts +++ b/arch/arm/dts/sama7g5ek.dts @@ -90,7 +90,7 @@ #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gmac0_default>; + pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txc_default>; phy-mode = "rgmii-id"; status = "okay"; @@ -173,7 +173,6 @@ <PIN_PA28__G0_RX2>, <PIN_PA29__G0_RX3>, <PIN_PA15__G0_TXEN>, - <PIN_PA24__G0_TXCK>, <PIN_PA30__G0_RXCK>, <PIN_PA18__G0_RXDV>, <PIN_PA22__G0_MDC>, @@ -182,6 +181,11 @@ bias-disable; }; + pinctrl_gmac0_txc_default: gmac0_txc_default { + pinmux = <PIN_PA24__G0_TXCK>; + bias-pull-up; + }; + pinctrl_gmac1_default: gmac1_default { pinmux = <PIN_PD30__G1_TXCK>, <PIN_PD22__G1_TX0>, |