diff options
| author | Michal Simek <michal.simek@xilinx.com> | 2022-01-19 12:01:51 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2022-02-07 10:37:21 +0100 |
| commit | af98bf62fab8f074822a225d7c2fb2a02a7734a8 (patch) | |
| tree | 5395bcb6f32258865904cb60042c4e612a996429 | |
| parent | 927adc27abf8db8454a162102b00c0b272a28762 (diff) | |
arm64: zynqmp: Remove SOM *u-boot.dtsi
Disable mmc from u-boot.dtsi file because it was there only for kv260
board. With kr260 this is not needed because we will switch to full DT per
board with SD/EMMC there too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3440d9f94361b4800658f313a5785f43ee84ecf3.1642590109.git.michal.simek@xilinx.com
| -rw-r--r-- | arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi | 21 | ||||
| -rw-r--r-- | arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi | 21 |
2 files changed, 0 insertions, 42 deletions
diff --git a/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi b/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi deleted file mode 100644 index 467df9f23a1..00000000000 --- a/arch/arm/dts/zynqmp-sm-k26-revA-u-boot.dtsi +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * dts file for Xilinx ZynqMP K26/KV260 SD wiring - * - * (C) Copyright 2020 - 2021, Xilinx, Inc. - * - * Michal Simek <michal.simek@xilinx.com> - */ - -/* SD0 only supports 3.3V, no level shifter */ -&sdhci1 { /* on CC - MIO 39 - 51 */ - status = "okay"; - no-1-8-v; - disable-wp; - broken-cd; - xlnx,mio-bank = <1>; - /* Do not run SD in HS mode from bootloader */ - sdhci-caps-mask = <0 0x200000>; - sdhci-caps = <0 0>; - max-frequency = <19000000>; -}; diff --git a/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi b/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi deleted file mode 100644 index 34e6328fb66..00000000000 --- a/arch/arm/dts/zynqmp-smk-k26-revA-u-boot.dtsi +++ /dev/null @@ -1,21 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * dts file for Xilinx ZynqMP Z2-VSOM - * - * (C) Copyright 2020 - 2021, Xilinx, Inc. - * - * Michal Simek <michal.simek@xilinx.com> - */ - -/* SD0 only supports 3.3V, no level shifter */ -&sdhci1 { /* FIXME - on CC - MIO 39 - 51 */ - status = "okay"; - no-1-8-v; - disable-wp; - broken-cd; - xlnx,mio-bank = <1>; - /* Do not run SD in HS mode from bootloader */ - sdhci-caps-mask = <0 0x200000>; - sdhci-caps = <0 0>; - max-frequency = <19000000>; -}; |