diff options
| author | xypron.glpk@gmx.de <xypron.glpk@gmx.de> | 2017-04-15 16:11:12 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-08-12 19:17:20 -0400 |
| commit | b730ff3fd65c8d1c33f1c05ca3fbab579a86abb4 (patch) | |
| tree | dfff16d78d38ee0d4e66fab6b4ea85790c57c4fa | |
| parent | da0227f7d2568c0cb0e435ed3caf780f9846d9a0 (diff) | |
omap3: incorrect logical check in do_emif4_init
((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x01)
is always false.
This does not match the comment
/*Wait till that bit clears*/
The problem was indicated by cppcheck.
I do not have the hardware to test if the code change below
leads to a correct system behavior.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/arm/mach-omap2/omap3/emif4.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c index d540cf08d2e..8197e7b0327 100644 --- a/arch/arm/mach-omap2/omap3/emif4.c +++ b/arch/arm/mach-omap2/omap3/emif4.c @@ -76,7 +76,7 @@ static void do_emif4_init(void) regval |= (1<<10); writel(regval, &emif4_base->sdram_iodft_tlgc); /*Wait till that bit clears*/ - while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x1); + while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) != 0x0); /*Re-verify the DDR PHY status*/ while ((readl(&emif4_base->sdram_sts) & (1<<2)) == 0x0); |