diff options
| author | Jayesh Choudhary <j-choudhary@ti.com> | 2025-01-06 15:34:00 +0530 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2025-01-20 08:32:48 -0600 |
| commit | bb28b4906e8dbb0f5a86a3613fb30069f89898f7 (patch) | |
| tree | 8869722c97482330e0bb094b0811a03f7c533c9a | |
| parent | b77791a11a0b6fdd8df6b223780e1b71bf8954f7 (diff) | |
arch: arm: mach-k3: j784s4_init: Set CTRL_MMR for AUDIO_REFCLK1 clk_sel
The default value for the mux to select the parent clock,
AUDIO_REFCLK1_CTRL_CLK_SEL is '11111' (31) but the mux input for 31
is marked as 'Reserved' so the ti-sci-clk call for get-parent fails.
Mark it to a valid value, '11100' (28) for MAIN_PLL4_HSDIV2_CLKOUT
to get rid of the linux failures during boot-time like:
"[ 1.573193] ti-sci-clk 44083000.system-controller:clock-controller:
get-parent failed for dev=157, clk=34, ret=-19"
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
| -rw-r--r-- | arch/arm/mach-k3/j784s4/j784s4_init.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-k3/j784s4/j784s4_init.c b/arch/arm/mach-k3/j784s4/j784s4_init.c index 8a41cd3bb50..787cf6261e4 100644 --- a/arch/arm/mach-k3/j784s4/j784s4_init.c +++ b/arch/arm/mach-k3/j784s4/j784s4_init.c @@ -23,6 +23,9 @@ #define J784S4_MAX_DDR_CONTROLLERS 4 +#define CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL 0x001082e4 +#define AUDIO_REFCLK1_DEFAULT 0x1c + /* NAVSS North Bridge (NB) */ #define NAVSS0_NBSS_NB0_CFG_MMRS 0x03702000 #define NAVSS0_NBSS_NB1_CFG_MMRS 0x03703000 @@ -201,6 +204,8 @@ void k3_spl_init(void) remove_fwl_configs(navss_cbass0_fwls, ARRAY_SIZE(navss_cbass0_fwls)); } + writel(AUDIO_REFCLK1_DEFAULT, (uintptr_t)CTRL_MMR_CFG0_AUDIO_REFCLK1_CTRL); + /* Output System Firmware version info */ k3_sysfw_print_ver(); } |