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authorStephan Gerhold <stephan.gerhold@linaro.org>2025-04-07 18:59:23 +0200
committerCaleb Connolly <caleb.connolly@linaro.org>2025-04-11 15:32:21 +0200
commitc53664c68105bc0a183b516f1cf77fdfd7a1e1a5 (patch)
treeb388e9c9949ed2f6b097834336117799a6f7f734
parentfa9eb2f1e6a4feb28f2fa489e153fac249b117fb (diff)
board: dragonboard410c: Fix RAM size
DB410c has exactly 1 GiB of RAM. Some of it is reserved, but this is described separately in the DT. This was fixed before in commit 1d667227ea51 ("board: dragonboard410c: Fix PHYS_SDRAM_1_SIZE"), but was reintroduced when DB410c was converted to use the upstream device tree. Note that there are variants of apq8016-sbc with 2 GiB RAM (e.g. the Geniatech DB4). They need the WIP SMEM memory map parsing [1] to use the full amount of RAM. [1]: https://lore.kernel.org/u-boot/20241124-b4-modernise-smem-v1-0-b7852c11b67c@linaro.org/T/ Fixes: ed8fbd2889fc ("dts: msm8916: replace with upstream DTS") Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-2-524aefbc8bb4@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
-rw-r--r--arch/arm/dts/apq8016-sbc-u-boot.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/apq8016-sbc-u-boot.dtsi b/arch/arm/dts/apq8016-sbc-u-boot.dtsi
index 585d54d2962..c8a46ed1448 100644
--- a/arch/arm/dts/apq8016-sbc-u-boot.dtsi
+++ b/arch/arm/dts/apq8016-sbc-u-boot.dtsi
@@ -6,7 +6,7 @@
/ {
/* When running as a first-stage bootloader this isn't filled in automatically */
memory@80000000 {
- reg = <0 0x80000000 0 0x3da00000>;
+ reg = <0 0x80000000 0 0x40000000>;
};
};