diff options
| author | Vaishnav Achath <vaishnav.a@ti.com> | 2024-11-29 17:01:32 +0530 | 
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-12-14 09:34:16 -0600 | 
| commit | c9df79ee64d0885277d5061a9426744920c4d6a5 (patch) | |
| tree | a6e03b6fd324e233989f6d2c8602e5377f646e33 | |
| parent | ecd2d7328cfa27c75c5a9e0d601d286a23a8ff01 (diff) | |
arm: dts: k3-j721e-r5-common: Add HBMC overrides for R5 SPL
Add 32-bit address overrides for Hyper Bus Memory Controller
for Hyperflash to be functional in R5 SPL.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
| -rw-r--r-- | arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 7 | 
1 files changed, 7 insertions, 0 deletions
| diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index ce55ea6bae0..c775432505b 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -51,6 +51,13 @@  	bootph-pre-ram;  }; +&hbmc { +	reg = <0x0 0x47040000 0x0 0x100>, +		<0x0 0x50000000 0x0 0x8000000>; +	ranges = <0x0 0x0 0x0 0x50000000 0x4000000>, +		 <0x1 0x0 0x0 0x54000000 0x800000>; +}; +  &ospi0 {  	/* Address change for data region (32-bit) */  	reg = <0x0 0x47040000 0x0 0x100>, | 
