summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorNeil Armstrong <neil.armstrong@linaro.org>2025-06-30 18:04:45 +0200
committerCasey Connolly <casey.connolly@linaro.org>2025-07-14 15:35:24 +0200
commitd8da51a87c2a73b3f6aa2bf38a8db91b16cc30a9 (patch)
treee61a0d57f04b71a15a1846b077318d454b307a12
parentd0ceeb944a4dba7f6893616cd80da7e95db72ba4 (diff)
gpio: qcom: move pm8550 gpio to new driver
Move support of the pm8550 gpios to the newly introduced driver and drop the compatible entry and the read-only quirk at the same time from the old driver. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Rui Miguel Silva <rui.silva@linaro.org> Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250630-topic-sm8x50-pmic-gpio-pinctrl-new-v2-2-cc1512931197@linaro.org Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
-rw-r--r--drivers/gpio/qcom_pmic_gpio.c20
-rw-r--r--drivers/gpio/qcom_spmi_gpio.c1
2 files changed, 2 insertions, 19 deletions
diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c
index cd9f3926ac4..4458c55cd3d 100644
--- a/drivers/gpio/qcom_pmic_gpio.c
+++ b/drivers/gpio/qcom_pmic_gpio.c
@@ -69,17 +69,6 @@
#define REG_EN_CTL 0x46
#define REG_EN_CTL_ENABLE (1 << 7)
-/**
- * pmic_gpio_match_data - platform specific configuration
- *
- * @PMIC_MATCH_READONLY: treat all GPIOs as readonly, don't attempt to configure them.
- * This is a workaround for an unknown bug on some platforms where trying to write the
- * GPIO configuration registers causes the board to hang.
- */
-enum pmic_gpio_quirks {
- QCOM_PMIC_QUIRK_READONLY = (1 << 0),
-};
-
struct qcom_pmic_gpio_data {
uint32_t pid; /* Peripheral ID on SPMI bus */
bool lv_mv_type; /* If subtype is GPIO_LV(0x10) or GPIO_MV(0x11) */
@@ -128,13 +117,8 @@ static int qcom_gpio_set_direction(struct udevice *dev, unsigned int offset,
{
struct qcom_pmic_gpio_data *plat = dev_get_plat(dev);
uint32_t gpio_base = plat->pid + REG_OFFSET(offset);
- ulong quirks = dev_get_driver_data(dev);
int ret = 0;
- /* Some PMICs don't like their GPIOs being configured */
- if (quirks & QCOM_PMIC_QUIRK_READONLY)
- return 0;
-
/* Disable the GPIO */
ret = pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL,
REG_EN_CTL_ENABLE, 0);
@@ -278,7 +262,6 @@ static int qcom_gpio_bind(struct udevice *dev)
{
struct qcom_pmic_gpio_data *plat = dev_get_plat(dev);
- ulong quirks = dev_get_driver_data(dev);
struct udevice *child;
struct driver *drv;
int ret;
@@ -292,7 +275,7 @@ static int qcom_gpio_bind(struct udevice *dev)
/* Bind the GPIO driver as a child of the PMIC. */
ret = device_bind_with_driver_data(dev, drv,
dev->name,
- quirks, dev_ofnode(dev), &child);
+ 0, dev_ofnode(dev), &child);
if (ret)
return log_msg_ret("bind", ret);
@@ -365,7 +348,6 @@ static const struct udevice_id qcom_gpio_ids[] = {
{ .compatible = "qcom,pms405-gpio" },
{ .compatible = "qcom,pm6125-gpio" },
{ .compatible = "qcom,pm8150-gpio" },
- { .compatible = "qcom,pm8550-gpio", .data = QCOM_PMIC_QUIRK_READONLY },
{ }
};
diff --git a/drivers/gpio/qcom_spmi_gpio.c b/drivers/gpio/qcom_spmi_gpio.c
index 2bb0f0d10c3..22c8072534e 100644
--- a/drivers/gpio/qcom_spmi_gpio.c
+++ b/drivers/gpio/qcom_spmi_gpio.c
@@ -743,6 +743,7 @@ static int qcom_spmi_pmic_gpio_probe(struct udevice *dev)
}
static const struct udevice_id qcom_spmi_pmic_gpio_ids[] = {
+ { .compatible = "qcom,pm8550-gpio" },
{ .compatible = "qcom,pm8550b-gpio" },
{ .compatible = "qcom,pm8550ve-gpio" },
{ .compatible = "qcom,pm8550vs-gpio" },