diff options
author | Michal Simek <michal.simek@xilinx.com> | 2022-02-23 15:52:03 +0100 |
---|---|---|
committer | Michal Simek <michal.simek@xilinx.com> | 2022-03-09 12:35:50 +0100 |
commit | d926695cc5680edfff9cfef36a14933ee3585fbf (patch) | |
tree | db3b3dba4507065777a7a38ead58a89c350d5478 | |
parent | 98cacab76542dba7fa7d42e32fc848d89d88d55a (diff) |
dma: xilinx: Add Display Port DMA driver
Display Port (DP) has own dma driver that's why add this skeleton driver
only for handling power domain setting and send configuration object to
PMUFW to enable it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/fe8bc313bcd430b04e9fa6fb770d5799ef28b350.1645627920.git.michal.simek@xilinx.com
-rw-r--r-- | drivers/dma/Kconfig | 7 | ||||
-rw-r--r-- | drivers/dma/Makefile | 1 | ||||
-rw-r--r-- | drivers/dma/xilinx_dpdma.c | 43 |
3 files changed, 51 insertions, 0 deletions
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 9cacea88d0c..0af54604211 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -68,6 +68,13 @@ config APBH_DMA help Enable APBH DMA driver. +config XILINX_DPDMA + bool "Enable ZynqMP Display Port DMA driver" + depends on DMA && ZYNQMP_POWER_DOMAIN + help + Enable support for Xilinx ZynqMP Display DMA driver. Currently + this file is used as placeholder for driver. The main reason is + to record compatible string and calling power domain driver. if APBH_DMA config APBH_DMA_BURST diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index afab324461b..a75572fe5de 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -13,5 +13,6 @@ obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o obj-$(CONFIG_TI_EDMA3) += ti-edma3.o obj-$(CONFIG_DMA_LPC32XX) += lpc32xx_dma.o +obj-$(CONFIG_XILINX_DPDMA) += xilinx_dpdma.o obj-y += ti/ diff --git a/drivers/dma/xilinx_dpdma.c b/drivers/dma/xilinx_dpdma.c new file mode 100644 index 00000000000..d4ee21dfc07 --- /dev/null +++ b/drivers/dma/xilinx_dpdma.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Xilinx Inc. + */ + +#include <common.h> +#include <cpu_func.h> +#include <dm.h> +#include <dma.h> +#include <dma-uclass.h> +#include <errno.h> +#include <dm/device_compat.h> + +/** + * struct zynqmp_dpdma_priv - Private structure + * @dev: Device uclass for video_ops + */ +struct zynqmp_dpdma_priv { + struct udevice *dev; +}; + +static int zynqmp_dpdma_probe(struct udevice *dev) +{ + /* Only placeholder for power domain driver */ + return 0; +} + +static const struct dma_ops zynqmp_dpdma_ops = { +}; + +static const struct udevice_id zynqmp_dpdma_ids[] = { + { .compatible = "xlnx,zynqmp-dpdma" }, + { } +}; + +U_BOOT_DRIVER(zynqmp_dpdma) = { + .name = "zynqmp_dpdma", + .id = UCLASS_DMA, + .of_match = zynqmp_dpdma_ids, + .ops = &zynqmp_dpdma_ops, + .probe = zynqmp_dpdma_probe, + .priv_auto = sizeof(struct zynqmp_dpdma_priv), +}; |