diff options
| author | Ondrej Jirman <megi@xff.cz> | 2023-05-22 23:47:06 +0200 |
|---|---|---|
| committer | Anatolij Gustschin <agust@denx.de> | 2023-07-14 18:27:43 +0200 |
| commit | dc3f2403c2ae65dea795855d97ce2bb1c2be2d35 (patch) | |
| tree | 2a0b1031465a646ab7749ea667705ec612ec86f6 | |
| parent | 4158d7f9879fce29ec46a565382135083b030ed8 (diff) | |
video: rockchip: dw_mipi_dsi: Fix best_rate calculation
pllref_clk is unused after being retrieved. fin needs to be set
to dsi->ref clock's rate for the following calculation to work.
Otherwise fin is undefined, and calculation return bogus number
based on undefined variable.
Signed-off-by: Ondrej Jirman <megi@xff.cz>
| -rw-r--r-- | drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c index 5e8db6bd2e6..6d8b1e6f541 100644 --- a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c +++ b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c @@ -505,7 +505,6 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, struct display_timing *timings, unsigned int _prediv, best_prediv; unsigned long _fbdiv, best_fbdiv; unsigned long min_delta = ULONG_MAX; - unsigned int pllref_clk; bpp = mipi_dsi_pixel_format_to_bpp(format); if (bpp < 0) { @@ -537,7 +536,7 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, struct display_timing *timings, return 0; } - pllref_clk = clk_get_rate(dsi->ref); + fin = clk_get_rate(dsi->ref); fout = target_mbps * USEC_PER_SEC; /* constraint: 5Mhz <= Fref / N <= 40MHz */ |