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authorThippeswamy Havalige <thippeswamy.havalige@amd.com>2023-09-11 16:10:50 +0200
committerMichal Simek <michal.simek@amd.com>2023-09-21 13:20:11 +0200
commitdf2ed08b2df708a9f343aa4f47954c90433e11c2 (patch)
treeda184e7f13a8268b610dbdaece350ffb88dc231f
parent9e568e4110cacc30828bda0fe72dbac1edfbcdf6 (diff)
arm64: zynqmp: Update ECAM size to discover up to 256 buses
Update ECAM size to discover up to 256 buses Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Acked-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/087391c3e1f60b0a765fca081d47ce632fda8f06.1694441445.git.michal.simek@amd.com
-rw-r--r--arch/arm/dts/zynqmp.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index a71875755bc..79c5af24110 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -678,7 +678,7 @@
msi-parent = <&pcie>;
reg = <0x0 0xfd0e0000 0x0 0x1000>,
<0x0 0xfd480000 0x0 0x1000>,
- <0x80 0x00000000 0x0 0x1000000>;
+ <0x80 0x00000000 0x0 0x10000000>;
reg-names = "breg", "pcireg", "cfg";
ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */
<0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */