diff options
author | Tom Rini <trini@konsulko.com> | 2025-09-22 08:22:22 -0600 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2025-09-22 08:22:22 -0600 |
commit | df4c18067fe04d42c9929d6c3565f8ec002b41f2 (patch) | |
tree | 0736a0f4ebb5336be0a1988ef4608a9f284f6722 | |
parent | d33b21b7e261691e8d6613a24cc9b0ececba3b01 (diff) | |
parent | 1f95591cee01ea5e065b61d99a9853b164acbcf8 (diff) |
Merge tag 'u-boot-imx-master-20250922' of https://gitlab.denx.de/u-boot/custodians/u-boot-imxHEADmaster
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27685
- Fix Phycore i.MX93 voltage modes
- Call DM post init function for init_r phase on i.MX8ULP
- Fix ELE FW version print bug on i.MX8UL EVK.
- Fix LPCG number in ccm_reg structure on i.MX93
-rw-r--r-- | arch/arm/include/asm/arch-imx9/clock.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-imx/imx8ulp/soc.c | 1 | ||||
-rw-r--r-- | board/freescale/imx8ulp_evk/spl.c | 4 | ||||
-rw-r--r-- | board/phytec/phycore_imx93/spl.c | 37 |
4 files changed, 22 insertions, 22 deletions
diff --git a/arch/arm/include/asm/arch-imx9/clock.h b/arch/arm/include/asm/arch-imx9/clock.h index ffaf6b5f7d8..ddc84d2c9ed 100644 --- a/arch/arm/include/asm/arch-imx9/clock.h +++ b/arch/arm/include/asm/arch-imx9/clock.h @@ -111,7 +111,7 @@ struct ccm_reg { u32 reserved_3[192]; struct ccm_lpcg_oscpll clk_oscplls[19]; /* 0x5000 */ u32 reserved_4[2768]; - struct ccm_lpcg_oscpll clk_lpcgs[122]; /* 0x8000 */ + struct ccm_lpcg_oscpll clk_lpcgs[127]; /* 0x8000 */ }; struct ana_pll_reg_elem { diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index e85cb0dd252..7640f9b84da 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -804,6 +804,7 @@ int imx8ulp_dm_post_init(void) return 0; } EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_F, imx8ulp_dm_post_init); +EVENT_SPY_SIMPLE(EVT_DM_POST_INIT_R, imx8ulp_dm_post_init); #if defined(CONFIG_XPL_BUILD) __weak void __noreturn jump_to_image(struct spl_image_info *spl_image) diff --git a/board/freescale/imx8ulp_evk/spl.c b/board/freescale/imx8ulp_evk/spl.c index d123b21b722..fe637077928 100644 --- a/board/freescale/imx8ulp_evk/spl.c +++ b/board/freescale/imx8ulp_evk/spl.c @@ -69,8 +69,8 @@ void display_ele_fw_version(void) } else { printf("ELE firmware version %u.%u.%u-%x", (fw_version & (0x00ff0000)) >> 16, - (fw_version & (0x0000ff00)) >> 8, - (fw_version & (0x000000ff)), sha1); + (fw_version & (0x0000fff0)) >> 4, + (fw_version & (0x0000000f)), sha1); ((fw_version & (0x80000000)) >> 31) == 1 ? puts("-dirty\n") : puts("\n"); } } diff --git a/board/phytec/phycore_imx93/spl.c b/board/phytec/phycore_imx93/spl.c index beaa536c600..9768b5257de 100644 --- a/board/phytec/phycore_imx93/spl.c +++ b/board/phytec/phycore_imx93/spl.c @@ -93,7 +93,7 @@ int power_init_board(void) { struct udevice *dev; int ret; - unsigned int val = 0; + unsigned int val = 0, buck_val; ret = pmic_get("pmic@25", &dev); if (ret == -ENODEV) { @@ -115,24 +115,23 @@ int power_init_board(void) return ret; val = ret; - if (IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)) { - /* 0.8v for Low drive mode */ - if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) { - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x0c); - pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x0c); - } else { - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x10); - pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x10); - } + if (is_voltage_mode(VOLT_LOW_DRIVE)) { + buck_val = 0x0c; /* 0.8v for Low drive mode */ + printf("PMIC: Low Drive Voltage Mode\n"); + } else if (is_voltage_mode(VOLT_NOMINAL_DRIVE)) { + buck_val = 0x10; /* 0.85v for Nominal drive mode */ + printf("PMIC: Nominal Voltage Mode\n"); } else { - /* 0.9v for Over drive mode */ - if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) { - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14); - pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x14); - } else { - pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x18); - pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x18); - } + buck_val = 0x14; /* 0.9v for Over drive mode */ + printf("PMIC: Over Drive Voltage Mode\n"); + } + + if (val & PCA9450_REG_PWRCTRL_TOFF_DEB) { + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val); + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val); + } else { + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, buck_val + 0x4); + pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, buck_val + 0x4); } /* set standby voltage to 0.65v */ @@ -174,7 +173,7 @@ void board_init_f(ulong dummy) power_init_board(); - if (!IS_ENABLED(CONFIG_IMX9_LOW_DRIVE_MODE)) + if (!is_voltage_mode(VOLT_LOW_DRIVE)) set_arm_core_max_clk(); /* Init power of mix */ |