diff options
| author | Andrew Goodbody <andrew.goodbody@linaro.org> | 2025-07-23 12:32:31 +0100 |
|---|---|---|
| committer | Tien Fong Chee <tien.fong.chee@intel.com> | 2025-07-30 17:45:29 +0800 |
| commit | dff25bb4abd082e852108b04beba0685a2980aaa (patch) | |
| tree | 304209a58a89339845f53dd6e610847863011cac | |
| parent | b9767ad357e16b2856be9110b6cf61f126325da4 (diff) | |
clk: n5x: Fix misplaced paren
Smatch reported an issue about the precedence of shift being higher than
mask in clk_get_emac_clk_hz. This turned out to be a misplaced paren in
one of the calculations. Fix this by placing the paren in the same place
as in the other similar calculations in the same function.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
| -rw-r--r-- | drivers/clk/altera/clk-n5x.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/altera/clk-n5x.c b/drivers/clk/altera/clk-n5x.c index 09db250ab6d..9e4e7a1d908 100644 --- a/drivers/clk/altera/clk-n5x.c +++ b/drivers/clk/altera/clk-n5x.c @@ -386,8 +386,8 @@ static u32 clk_get_emac_clk_hz(struct socfpga_clk_plat *plat, u32 emac_id) } else { clock /= 1 + ((CM_REG_READL(plat, CLKMGR_PERPLL_PLLOUTDIV) & - CLKMGR_PLLOUTDIV_C3CNT_MASK >> - CLKMGR_PLLOUTDIV_C3CNT_OFFSET)); + CLKMGR_PLLOUTDIV_C3CNT_MASK) >> + CLKMGR_PLLOUTDIV_C3CNT_OFFSET); } break; |